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From: <Tudor.Ambarus@microchip.com>
To: <linux-mtd@lists.infradead.org>
Cc: vigneshr@ti.com, richard@nod.at, michael@walle.cc,
	linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v2] mtd: spi-nor: Add support for w25q32jwm
Date: Sun, 19 Jan 2020 07:19:09 +0000
Message-ID: <5149002.dABgk2UiNj@192.168.0.113> (raw)
In-Reply-To: <20200116154209.32654-1-michael@walle.cc>

On Thursday, January 16, 2020 5:42:09 PM EET Michael Walle wrote:
> Add support for the Winbond W25Q32JW-xM flashes. These have a
> programmable QE bit. There is also the W25Q32JW-xQ variant which shares
> the ID with the W25Q32DW and W25Q32FW parts. The W25Q32JW-xQ has the QE
> bit hard strapped to 1, thus don't support the /HOLD and /WP pins.
> 
> This was tested in single, dual and quad mode on a custom board with the
> NXP FlexSPI controller. Also the BP bits as well as the TB bit were
> tested.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> This patch superseeds the following patch:
>   https://lore.kernel.org/linux-mtd/20200103223423.14025-1-michael@walle.cc/
> 
> changes since v1:
>  - renamed flash to w25q32jwm
>  - removed untested flashes
>  - reworded the commit message
> 
>  drivers/mtd/spi-nor/spi-nor.c | 5 +++++
>  1 file changed, 5 insertions(+)

Applied to spi-nor/next. Thanks.
ta


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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-16 15:42 Michael Walle
2020-01-19  7:19 ` Tudor.Ambarus [this message]

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