From: Takahiro Kuwano <kuwano.takahiro@gmail.com>
To: Tudor.Ambarus@microchip.com, linux-mtd@lists.infradead.org
Cc: richard@nod.at, Takahiro.Kuwano@cypress.com,
Bacem.Daassi@cypress.com, vigneshr@ti.com,
miquel.raynal@bootlin.com
Subject: Re: [PATCH] mtd: spi-nor: spansion: Remove s70fl01gs from flash_info
Date: Tue, 7 Jul 2020 14:48:44 +0900 [thread overview]
Message-ID: <63f7d4a7-18fc-e699-10dc-9be781d5b0cb@gmail.com> (raw)
In-Reply-To: <48516fcf-70fd-dffe-96b4-39a7772eaabc@microchip.com>
On 7/3/20 9:20 PM, Tudor.Ambarus@microchip.com wrote:
> On 6/26/20 8:16 AM, kuwano.takahiro@gmail.com wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> From: Takahiro Kuwano <Takahiro.Kuwano@cypress.com>
>>
>> The s70fl01gs is a dual die stack of two s25fl512s die with dedicated chip
>> select pins to each. Tested with the device and confirmed that is working
>> as two s25fl512s devices. The current device ID in the flash_info table
>
> Right, the datasheet specifies too that the S70FS01GS device is a dual die
> stack of two FS512S die.
>
>> matches with s70fs01gs which does not work with current MTD.
>
> s70fs01gs is not correctly supported indeed, but the lower half of it
> (first s25fl512s die) should work. Can't you correctly read/erase/write
> on the lower half of the s70fs01gs flash with the current code?
No, because the S70FS01GS does not support RDSR(05h) which is critical
for erase/write. The S70FS01GS is a dual die stack with one chip select.
Accessing to the registers requires RDAR(65h)/WRAR(71h) designating die
and register address.
Best Regards,
Takahiro
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next prev parent reply other threads:[~2020-07-07 5:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 5:16 [PATCH] mtd: spi-nor: spansion: Remove s70fl01gs from flash_info kuwano.takahiro
2020-07-03 12:20 ` Tudor.Ambarus
2020-07-07 5:48 ` Takahiro Kuwano [this message]
2020-07-13 9:26 ` Tudor Ambarus
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