From: <Tudor.Ambarus@microchip.com>
To: <macromorgan@hotmail.com>
Cc: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com>,
<figgyc@figgyc.uk>, <mail@david-bauer.net>,
<linux@rasmusvillemoes.dk>, <esben@geanix.com>,
<knaerzche@gmail.com>, <code@reto-schneider.ch>,
<zhengxunli@mxic.com.tw>, <jaimeliao@mxic.com.tw>,
<heiko.thiery@gmail.com>, <sr@denx.de>,
<miquel.raynal@bootlin.com>, <richard@nod.at>,
<linux-mtd@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<Nicolas.Ferre@microchip.com>
Subject: Re: [PATCH v2 06/35] mtd: spi-nor: manuf-id-collisions: Add support for xt25f128b
Date: Wed, 28 Jul 2021 04:10:59 +0000 [thread overview]
Message-ID: <6cfcc22e-5f78-59a6-9781-613be62f3178@microchip.com> (raw)
In-Reply-To: <SN6PR06MB534253FF244275974E04E2EBA5E99@SN6PR06MB5342.namprd06.prod.outlook.com>
On 7/27/21 6:52 PM, Chris Morgan wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Jul 27, 2021 at 07:51:53AM +0300, Tudor Ambarus wrote:
>> Flash does not support continuation codes and may collide with a flash
>> of other manufacturer, Intersil being an example .
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> ---
>> 0000000 4653 5044 0100 ff01 0000 0901 0030 ff00
>> 0000010 000b 0301 0060 ff00 ffff ffff ffff ffff
>> 0000020 ffff ffff ffff ffff ffff ffff ffff ffff
>> 0000030 20e5 fff1 ffff 07ff eb44 6b08 3b08 bb42
>> 0000040 ffee ffff ffff ff00 ffff ff00 200c 520f
>> 0000050 d810 ff00 ffff ffff ffff ffff ffff ffff
>> 0000060 3600 2700 f99f 6477 e8d9 ffff
>>
>> drivers/mtd/spi-nor/manuf-id-collisions.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/manuf-id-collisions.c b/drivers/mtd/spi-nor/manuf-id-collisions.c
>> index bf7dba34f018..db31470ebf6a 100644
>> --- a/drivers/mtd/spi-nor/manuf-id-collisions.c
>> +++ b/drivers/mtd/spi-nor/manuf-id-collisions.c
>> @@ -13,6 +13,10 @@ static const struct flash_info id_collision_parts[] = {
>> { "by25q128as", INFO(0x684018, 0, 64 * 1024, 256, SPI_NOR_SKIP_SFDP |
>> SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
>> SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
>> +
>> + /* XTX (XTX Technology Limited) */
>> + { "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256, SPI_NOR_PARSE_SFDP |
>> + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
>
> My apologies for being ignorant of this, but I'm not 100% sure of these
> two values (SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB), even though I
Oh yes, I forgot you have already mentioned this in the previous email thread.
> included them in my original commit. Looking at the datasheet for this
> I can see that there are 5 block protect bits (BP0 - BP4) corresponding
> to status registers SR2 through SR6. Status register bits SR7 and SR8
> correspond to "status register protect 0 and status register protect 1"
> bits as well. The Rockchip engineer I was testing the SFC with did
> not have these flags as well on their driver they were using for this
> chip too. I have tested with and without, and they seem to work
> regardless. Is there a way to know for sure if these should or should
> not be here?
We should do some locking tests to verify if these flags are ok for
this flash.
>
> Here is a link to the datasheet I was working off of:
> https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf
>
I'll take a look and try to provide some guidelines on how the locking part
can be tested.
> When this is confirmed I'll be glad to provide my "Tested-by" line.
Cool, thanks!
ta
>
> Thank you.
>
>> };
>>
>> const struct spi_nor_manufacturer spi_nor_manuf_id_collisions = {
>> --
>> 2.25.1
>>
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next prev parent reply other threads:[~2021-07-28 4:12 UTC|newest]
Thread overview: 133+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-27 4:51 [PATCH v2 00/35] mtd: spi-nor: Handle ID collisions and clean params init Tudor Ambarus
2021-07-27 4:51 ` [PATCH v2 01/35] mtd: spi-nor: core: Introduce SPI_NOR_PARSE_SFDP Tudor Ambarus
2021-08-04 8:09 ` Pratyush Yadav
2021-08-23 22:17 ` Michael Walle
2021-07-27 4:51 ` [PATCH v2 02/35] mtd: spi-nor: core: Report correct name in case of ID collisions Tudor Ambarus
2021-08-04 8:23 ` Pratyush Yadav
2021-08-23 22:32 ` Michael Walle
2021-07-27 4:51 ` [PATCH v2 03/35] mtd: spi-nor: macronix: Handle ID collision b/w MX25L3233F and MX25L3205D Tudor Ambarus
2021-08-23 22:42 ` Michael Walle
2021-10-01 8:41 ` Tudor.Ambarus
2021-07-27 4:51 ` [PATCH v2 04/35] mtd: spi-nor: macronix: Handle ID collision b/w MX25L12805D and MX25L12835F Tudor Ambarus
2021-08-23 22:44 ` Michael Walle
2021-07-27 4:51 ` [PATCH v2 05/35] mtd: spi-nor: Introduce Manufacturer ID collisions driver Tudor Ambarus
2021-08-16 18:28 ` Pratyush Yadav
2021-08-23 22:47 ` Michael Walle
2021-10-01 9:16 ` Tudor.Ambarus
2021-10-24 17:44 ` Michael Walle
2021-11-06 9:58 ` Tudor.Ambarus
2021-07-27 4:51 ` [PATCH v2 06/35] mtd: spi-nor: manuf-id-collisions: Add support for xt25f128b Tudor Ambarus
2021-07-27 15:52 ` Chris Morgan
2021-07-28 4:10 ` Tudor.Ambarus [this message]
2021-08-16 18:43 ` Pratyush Yadav
2021-10-01 9:26 ` Tudor.Ambarus
2021-07-27 4:51 ` [PATCH v2 07/35] mtd: spi-nor: manuf-id-collisions: Add support for xm25qh64c Tudor Ambarus
2021-08-16 18:45 ` Pratyush Yadav
2021-07-27 4:51 ` [PATCH v2 08/35] mtd: spi-nor: core: Introduce the ate_init() hook Tudor Ambarus
2021-08-16 18:54 ` Pratyush Yadav
2021-09-09 21:40 ` Michael Walle
2021-10-01 9:44 ` Tudor.Ambarus
2021-10-01 9:38 ` Tudor.Ambarus
2021-07-27 4:51 ` [PATCH v2 09/35] mtd: spi-nor: atmel: Use flash late_init() for locking Tudor Ambarus
2021-08-16 19:06 ` Pratyush Yadav
2021-09-09 21:44 ` Michael Walle
2021-10-01 11:40 ` Tudor.Ambarus
2021-10-02 12:58 ` Michael Walle
2021-10-11 6:27 ` Pratyush Yadav
2021-07-27 4:51 ` [PATCH v2 10/35] mtd: spi-nor: sst: " Tudor Ambarus
2021-08-16 19:09 ` Pratyush Yadav
2021-10-01 11:43 ` Tudor.Ambarus
2021-10-01 12:19 ` Pratyush Yadav
2021-09-09 21:52 ` Michael Walle
2021-07-27 4:51 ` [PATCH v2 11/35] mtd: spi-nor: winbond: Use manufacturer late_init() for OTP ops Tudor Ambarus
2021-08-16 19:17 ` Pratyush Yadav
2021-09-09 21:50 ` Michael Walle
2021-10-01 11:58 ` Tudor.Ambarus
2021-10-01 11:54 ` Tudor.Ambarus
2021-10-11 6:54 ` Pratyush Yadav
2021-07-27 4:51 ` [PATCH v2 12/35] mtd: spi-nor: xilinx: Use manufacturer late_init() to set setup method Tudor Ambarus
2021-08-16 19:19 ` Pratyush Yadav
2021-09-09 21:53 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 13/35] mtd: spi-nor: sst: Use manufacturer late_init() to set _write() Tudor Ambarus
2021-08-16 19:20 ` Pratyush Yadav
2021-09-09 21:54 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 14/35] mtd: spi-nor: spansion: Use manufacturer late_init() Tudor Ambarus
2021-08-16 19:22 ` Pratyush Yadav
2021-09-09 22:02 ` Michael Walle
2021-10-01 12:14 ` Tudor.Ambarus
2021-10-02 13:14 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 15/35] mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined Tudor Ambarus
2021-08-16 19:31 ` Pratyush Yadav
2021-10-01 12:31 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 16/35] mtd: spi-nor: core: Mark default_init() as deprecated Tudor Ambarus
2021-08-16 19:36 ` Pratyush Yadav
2021-10-01 14:18 ` Tudor.Ambarus
2021-10-01 17:06 ` Pratyush Yadav
2021-07-27 4:52 ` [PATCH v2 17/35] mtd: spi-nor: Introduce spi_nor_nonsfdp_flags_init() Tudor Ambarus
2021-08-17 10:24 ` Pratyush Yadav
2021-08-17 12:15 ` Tudor.Ambarus
2021-10-22 11:21 ` Michael Walle
2021-10-22 12:10 ` Pratyush Yadav
2021-10-22 12:42 ` Tudor.Ambarus
2021-10-22 12:59 ` Michael Walle
2021-10-22 13:25 ` Tudor.Ambarus
2021-10-24 17:05 ` Michael Walle
2021-10-25 12:18 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 18/35] mtd: spi-nor: Get rid of SPI_NOR_4B_OPCODES flag Tudor Ambarus
2021-08-17 12:16 ` Pratyush Yadav
2021-10-04 3:18 ` Tudor.Ambarus
2021-10-19 17:26 ` Pratyush Yadav
2021-10-20 9:55 ` Tudor.Ambarus
2021-10-21 8:44 ` Tudor.Ambarus
2021-10-21 9:30 ` Pratyush Yadav
2021-10-22 11:37 ` Michael Walle
2021-10-22 12:43 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 19/35] mtd: spi-nor: Get rid of SPI_NOR_IO_MODE_EN_VOLATILE flag Tudor Ambarus
2021-08-17 12:21 ` Pratyush Yadav
2021-10-04 3:52 ` Tudor.Ambarus
2021-10-11 6:15 ` Pratyush Yadav
2021-07-27 4:52 ` [PATCH v2 20/35] mtd: spi-nor: core: Use container_of to get the pointer to struct spi_nor Tudor Ambarus
2021-07-27 7:08 ` Rasmus Villemoes
2021-10-22 8:00 ` Tudor.Ambarus
2021-08-17 12:23 ` Pratyush Yadav
2021-07-27 4:52 ` [PATCH v2 21/35] mtd: spi-nor: Introduce spi_nor_set_mtd_info() Tudor Ambarus
2021-08-16 7:25 ` Tudor.Ambarus
2021-08-17 16:23 ` Pratyush Yadav
2021-10-22 11:53 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 22/35] mtd: spi-nor: core: Use common naming scheme for setting mtd_info fields Tudor Ambarus
2021-08-17 16:26 ` Pratyush Yadav
2021-10-22 11:57 ` Michael Walle
2021-10-22 12:51 ` Tudor.Ambarus
2021-10-22 13:08 ` Michael Walle
2021-10-22 13:34 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 23/35] mtd: spi-nor: Get rid of nor->page_size Tudor Ambarus
2021-08-17 16:33 ` Pratyush Yadav
2021-10-22 12:01 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 24/35] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description Tudor Ambarus
2021-08-17 16:47 ` Pratyush Yadav
2021-10-22 12:07 ` Michael Walle
2021-07-27 4:52 ` [PATCH v2 25/35] mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup() Tudor Ambarus
2021-08-17 16:52 ` Pratyush Yadav
2021-10-22 12:12 ` Michael Walle
2021-10-22 12:36 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 26/35] mtd: spi-nor: core: Introduce spi_nor_init_default_params() Tudor Ambarus
2021-08-24 17:30 ` Pratyush Yadav
2021-10-04 4:17 ` Tudor.Ambarus
2021-10-22 12:41 ` Michael Walle
2021-10-22 12:55 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 27/35] mtd: spi-nor: core: Init flash params based on SFDP first for new flash additions Tudor Ambarus
2021-08-24 17:51 ` Pratyush Yadav
2021-10-04 5:01 ` Tudor.Ambarus
2021-10-04 11:36 ` Tudor.Ambarus
2021-07-27 4:52 ` [PATCH v2 28/35] mtd: spi-nor: sst: sst26vf064b: Use SPI_NOR_PARSE_SFDP Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 29/35] mtd: spi-nor: winbond: w25q256jvm: " Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 30/35] mtd: spi-nor: issi: is25lp256: " Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 31/35] mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 32/35] mtd: spi-nor: gigadevice: gd25q256: Use SPI_NOR_PARSE_SFDP Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 33/35] mtd: spi-nor: micron-st: n25q256a: " Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 34/35] mtd: spi-nor: macronix: mx25l25635e: " Tudor Ambarus
2021-07-27 4:52 ` [PATCH v2 35/35] docs: mtd: spi-nor: Add details about how to propose a new flash addition Tudor Ambarus
2021-07-27 7:22 ` Michael Walle
2021-07-27 8:09 ` Tudor.Ambarus
2021-07-27 8:49 ` Michael Walle
2021-08-24 17:58 ` Pratyush Yadav
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