From: Vignesh Raghavendra <vigneshr@ti.com>
To: <Tudor.Ambarus@microchip.com>, <boris.brezillon@collabora.com>
Cc: richard@nod.at, linux-mtd@lists.infradead.org,
linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v4 02/20] mtd: spi-nor: Print debug info inside Reg Ops methods
Date: Tue, 5 Nov 2019 17:43:58 +0530 [thread overview]
Message-ID: <6f999f6f-3eff-98b6-a6af-a58a143e1171@ti.com> (raw)
In-Reply-To: <20191102112316.20715-3-tudor.ambarus@microchip.com>
On 02/11/19 4:53 PM, Tudor.Ambarus@microchip.com wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> Spare the callers of printing debug messages by themselves.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Regards
Vignesh
> ---
> drivers/mtd/spi-nor/spi-nor.c | 169 +++++++++++++++++++++++++++++++-----------
> 1 file changed, 127 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index eca6bce7c336..0cb3122e74ad 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -394,6 +394,8 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
> */
> static int spi_nor_write_enable(struct spi_nor *nor)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 1),
> @@ -401,10 +403,16 @@ static int spi_nor_write_enable(struct spi_nor *nor)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_WREN, NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d on Write Enable\n", ret);
> +
> + return ret;
> }
>
> /*
> @@ -412,6 +420,8 @@ static int spi_nor_write_enable(struct spi_nor *nor)
> */
> static int spi_nor_write_disable(struct spi_nor *nor)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 1),
> @@ -419,10 +429,16 @@ static int spi_nor_write_disable(struct spi_nor *nor)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d on Write Disable\n", ret);
> +
> + return ret;
> }
>
> /**
> @@ -524,6 +540,8 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)
> */
> static int spi_nor_write_sr(struct spi_nor *nor, u8 val)
> {
> + int ret;
> +
> nor->bouncebuf[0] = val;
> if (nor->spimem) {
> struct spi_mem_op op =
> @@ -532,15 +550,23 @@ static int spi_nor_write_sr(struct spi_nor *nor, u8 val)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,
> + nor->bouncebuf, 1);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,
> - nor->bouncebuf, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d writing SR\n", ret);
> +
> + return ret;
> +
> }
>
> static int macronix_set_4byte(struct spi_nor *nor, bool enable)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(enable ?
> @@ -551,12 +577,18 @@ static int macronix_set_4byte(struct spi_nor *nor, bool enable)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor,
> + enable ? SPINOR_OP_EN4B :
> + SPINOR_OP_EX4B,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, enable ? SPINOR_OP_EN4B :
> - SPINOR_OP_EX4B,
> - NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
> +
> + return ret;
> }
>
> static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
> @@ -572,6 +604,8 @@ static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
>
> static int spansion_set_4byte(struct spi_nor *nor, bool enable)
> {
> + int ret;
> +
> nor->bouncebuf[0] = enable << 7;
>
> if (nor->spimem) {
> @@ -581,15 +615,22 @@ static int spansion_set_4byte(struct spi_nor *nor, bool enable)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
> + nor->bouncebuf, 1);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
> - nor->bouncebuf, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
> +
> + return ret;
> }
>
> static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
> {
> + int ret;
> +
> nor->bouncebuf[0] = ear;
>
> if (nor->spimem) {
> @@ -599,11 +640,16 @@ static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,
> + nor->bouncebuf, 1);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,
> - nor->bouncebuf, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d writing EAR\n", ret);
> +
> + return ret;
> }
>
> static int winbond_set_4byte(struct spi_nor *nor, bool enable)
> @@ -628,6 +674,8 @@ static int winbond_set_4byte(struct spi_nor *nor, bool enable)
>
> static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 1),
> @@ -635,10 +683,16 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_IN(1, sr, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR,
> + sr, 1);
> }
>
> - return nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR, sr, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d reading XRDSR\n", ret);
> +
> + return ret;
> }
>
> static int s3an_sr_ready(struct spi_nor *nor)
> @@ -646,16 +700,16 @@ static int s3an_sr_ready(struct spi_nor *nor)
> int ret;
>
> ret = spi_nor_xread_sr(nor, nor->bouncebuf);
> - if (ret) {
> - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret);
> + if (ret)
> return ret;
> - }
>
> return !!(nor->bouncebuf[0] & XSR_RDY);
> }
>
> static int spi_nor_clear_sr(struct spi_nor *nor)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 1),
> @@ -663,10 +717,16 @@ static int spi_nor_clear_sr(struct spi_nor *nor)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d clearing SR\n", ret);
> +
> + return ret;
> }
>
> static int spi_nor_sr_ready(struct spi_nor *nor)
> @@ -692,6 +752,8 @@ static int spi_nor_sr_ready(struct spi_nor *nor)
>
> static int spi_nor_clear_fsr(struct spi_nor *nor)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 1),
> @@ -699,10 +761,16 @@ static int spi_nor_clear_fsr(struct spi_nor *nor)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d clearing FSR\n", ret);
> +
> + return ret;
> }
>
> static int spi_nor_fsr_ready(struct spi_nor *nor)
> @@ -839,6 +907,8 @@ static int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 status_new,
>
> static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 1),
> @@ -846,14 +916,22 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_OUT(1, sr2, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2,
> + sr2, 1);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2, sr2, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d writing SR2\n", ret);
> +
> + return ret;
> }
>
> static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
> {
> + int ret;
> +
> if (nor->spimem) {
> struct spi_mem_op op =
> SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 1),
> @@ -861,10 +939,16 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_IN(1, sr2, 1));
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2,
> + sr2, 1);
> }
>
> - return nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2, sr2, 1);
> + if (ret)
> + dev_dbg(nor->dev, "error %d reading SR2\n", ret);
> +
> + return ret;
> }
>
> /*
> @@ -874,6 +958,8 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
> */
> static int spi_nor_erase_chip(struct spi_nor *nor)
> {
> + int ret;
> +
> dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10));
>
> if (nor->spimem) {
> @@ -883,11 +969,16 @@ static int spi_nor_erase_chip(struct spi_nor *nor)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_NO_DATA);
>
> - return spi_mem_exec_op(nor->spimem, &op);
> + ret = spi_mem_exec_op(nor->spimem, &op);
> + } else {
> + ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,
> + NULL, 0);
> }
>
> - return nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,
> - NULL, 0);
> + if (ret)
> + dev_dbg(nor->dev, "error %d erasing chip\n", ret);
> +
> + return ret;
> }
>
> static struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
> @@ -1934,10 +2025,8 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
> spi_nor_write_enable(nor);
>
> ret = spi_nor_write_sr2(nor, sr2);
> - if (ret) {
> - dev_dbg(nor->dev, "error while writing status register 2\n");
> + if (ret)
> return ret;
> - }
>
> ret = spi_nor_wait_till_ready(nor);
> if (ret)
> @@ -1977,10 +2066,8 @@ static int spi_nor_clear_sr_bp(struct spi_nor *nor)
> spi_nor_write_enable(nor);
>
> ret = spi_nor_write_sr(nor, nor->bouncebuf[0] & ~mask);
> - if (ret) {
> - dev_dbg(nor->dev, "write to status register failed\n");
> + if (ret)
> return ret;
> - }
>
> return spi_nor_wait_till_ready(nor);
> }
> @@ -2739,10 +2826,8 @@ static int s3an_nor_setup(struct spi_nor *nor,
> int ret;
>
> ret = spi_nor_xread_sr(nor, nor->bouncebuf);
> - if (ret) {
> - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret);
> + if (ret)
> return ret;
> - }
>
> nor->erase_opcode = SPINOR_OP_XSE;
> nor->program_opcode = SPINOR_OP_XPP;
>
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next prev parent reply other threads:[~2019-11-05 12:13 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-02 11:23 [PATCH v4 00/20] mtd: spi-nor: Quad Enable and (un)lock methods Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 01/20] mtd: spi-nor: Use dev_dbg insted of dev_err for low level info Tudor.Ambarus
2019-11-05 12:12 ` Vignesh Raghavendra
2019-11-06 7:07 ` Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 02/20] mtd: spi-nor: Print debug info inside Reg Ops methods Tudor.Ambarus
2019-11-05 12:13 ` Vignesh Raghavendra [this message]
2019-11-02 11:23 ` [PATCH v4 03/20] mtd: spi-nor: Check for errors after each Register Operation Tudor.Ambarus
2019-11-06 9:19 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 04/20] mtd: spi-nor: Rename label as it is no longer generic Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 05/20] mtd: spi-nor: Void return type for spi_nor_clear_sr/fsr() Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 06/20] mtd: spi-nor: Move the WE and wait calls inside Write SR methods Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 07/20] mtd: spi-nor: Merge spi_nor_write_sr() and spi_nor_write_sr_cr() Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 08/20] mtd: spi-nor: Describe all the Reg Ops Tudor.Ambarus
2019-11-05 12:21 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 09/20] mtd: spi-nor: Drop spansion_quad_enable() Tudor.Ambarus
2019-11-05 12:35 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 10/20] mtd: spi-nor: Fix errno on Quad Enable methods Tudor.Ambarus
2019-11-05 12:36 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 11/20] mtd: spi-nor: Check all the bits written, not just the BP ones Tudor.Ambarus
2019-11-05 12:21 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 12/20] mtd: spi-nor: Print debug message when the read back test fails Tudor.Ambarus
2019-11-05 12:37 ` Vignesh Raghavendra
2019-11-06 7:24 ` Tudor.Ambarus
2019-11-06 7:39 ` Vignesh Raghavendra
2019-11-07 5:58 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 13/20] mtd: spi-nor: Fix clearing of QE bit on lock()/unlock() Tudor.Ambarus
2019-11-05 17:07 ` Vignesh Raghavendra
2019-11-06 8:33 ` Tudor.Ambarus
2019-11-06 16:26 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 14/20] mtd: spi-nor: Extend the QE Read Back test to the entire SR byte Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 15/20] mtd: spi-nor: Extend the QE Read Back test to both SR1 and SR2 Tudor.Ambarus
2019-11-05 16:06 ` Vignesh Raghavendra
2019-11-06 8:41 ` Tudor.Ambarus
2019-11-02 11:23 ` [PATCH v4 16/20] mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1 Tudor.Ambarus
2019-11-06 5:45 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 17/20] mtd: spi-nor: Merge spansion Quad Enable methods Tudor.Ambarus
2019-11-06 5:46 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 18/20] mtd: spi-nor: Rename macronix_quad_enable to spi_nor_sr1_bit6_quad_enable Tudor.Ambarus
2019-11-06 6:00 ` Vignesh Raghavendra
2019-11-02 11:23 ` [PATCH v4 19/20] mtd: spi-nor: Prepend "spi_nor_" to "sr2_bit7_quad_enable" Tudor.Ambarus
2019-11-02 11:24 ` [PATCH v4 20/20] mtd: spi-nor: Rework the disabling of block write protection Tudor.Ambarus
2019-11-07 6:27 ` [PATCH v4 00/20] mtd: spi-nor: Quad Enable and (un)lock methods Tudor.Ambarus
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