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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Chris Brandt <chris.brandt@renesas.com>,
	linux-mtd@lists.infradead.org,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Mason Yang <masonccyang@mxic.com.tw>
Subject: [PATCH v3 0/2] Add Renesas RPC-IF support
Date: Sat, 13 Jun 2020 21:37:47 +0300	[thread overview]
Message-ID: <721e5306-6dc5-4a3a-2bbb-459be6261357@cogentembedded.com> (raw)

Hello!

Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...

Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.

[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver

MBR, Sergei

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             reply	other threads:[~2020-06-13 18:38 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-13 18:37 Sergei Shtylyov [this message]
2020-06-13 18:38 ` [PATCH v3 0/2] Add Renesas RPC-IF support Sergei Shtylyov
2020-06-13 18:40 ` [PATCH v4 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
2020-06-13 18:42 ` [PATCH v4 2/2] memory: add Renesas RPC-IF driver Sergei Shtylyov
  -- strict thread matches above, loose matches on Subject: below --
2020-05-18 20:31 [PATCH v3 0/2] Add Renesas RPC-IF support Sergei Shtylyov

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