* [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support
@ 2019-08-23 16:05 Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 1/2] " Tudor.Ambarus
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Tudor.Ambarus @ 2019-08-23 16:05 UTC (permalink / raw)
To: marek.vasut, vigneshr, boris.brezillon, miquel.raynal, richard,
linux-mtd, linux-kernel
Cc: Tudor.Ambarus
From: Tudor Ambarus <tudor.ambarus@microchip.com>
This is similar with what other nor flashes are doing by clearing the
block protection bits from the status register: disable the write
protection after a power-on reset cycle.
The Global Block-Protection Unlock command offers a single command cycle
that unlocks the entire memory array. Prefer this method for higher
throughput.
Tested on the sst26vf064b flash using the atmel-quadspi driver.
Tudor Ambarus (2):
mtd: spi-nor: add Global Block Unlock support
mtd: spi-nor: unlock global block protection on sst26vf064b
drivers/mtd/spi-nor/spi-nor.c | 51 +++++++++++++++++++++++++++++++++++++++++--
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 50 insertions(+), 2 deletions(-)
--
2.9.5
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] mtd: spi-nor: add Global Block Unlock support
2019-08-23 16:05 [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
@ 2019-08-23 16:05 ` Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 2/2] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-08-23 16:07 ` [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2 siblings, 0 replies; 4+ messages in thread
From: Tudor.Ambarus @ 2019-08-23 16:05 UTC (permalink / raw)
To: marek.vasut, vigneshr, boris.brezillon, miquel.raynal, richard,
linux-mtd, linux-kernel
Cc: Tudor.Ambarus
From: Tudor Ambarus <tudor.ambarus@microchip.com>
To avoid inadvertent writes during power-up, some flashes are
write-protected by default after a power-on reset cycle.
A Global Block-Protection Unlock command offers a single
command cycle that unlocks the entire memory array. This is
identical with what other nor flashes are doing by clearing
the block protection bits from the status register: disable
the write protection after a power-on reset cycle.
We can't determine this purely by manufacturer type and it's not
autodetectable by anything like SFDP, so make a new flag for it:
UNLOCK_GLOBAL_BLOCK.
Note that the Global Block Unlock command has different names
depending on the manufacturer, but always the same command value:
0x98. Macronix's MX25U12835F names it Gang Block Unlock,
Winbound's W25Q128FV names it Global Block Unlock and
Microchip's SST26VF064B names it Global Block Protection Unlock.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 47 ++++++++++++++++++++++++++++++++++++++++++-
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index f5c1c71caf1b..08ae45fdc44a 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -186,7 +186,7 @@ struct flash_info {
u16 page_size;
u16 addr_width;
- u16 flags;
+ u32 flags;
#define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
#define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
#define SST_WRITE BIT(2) /* use SST byte programming */
@@ -215,6 +215,7 @@ struct flash_info {
#define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
#define USE_CLSR BIT(14) /* use CLSR command */
#define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
+#define UNLOCK_GLOBAL_BLOCK BIT(16) /* Unlock global block protection */
/* Part specific fixup hooks. */
const struct spi_nor_fixups *fixups;
@@ -2025,6 +2026,41 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
return spi_nor_clear_sr_bp(nor);
}
+/**
+ * spi_nor_unlock_global_block_protection() - Unlock the Global Block Protection
+ * @nor: pointer to a 'struct spi_nor'
+ *
+ * The Global Block-Protection Unlock command offers a single command cycle
+ * that unlocks the entire memory array.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
+{
+ int ret;
+
+ write_enable(nor);
+
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_ULBPR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ ret = spi_mem_exec_op(nor->spimem, &op);
+ } else {
+ ret = nor->write_reg(nor, SPINOR_OP_ULBPR, NULL, 0);
+ }
+
+ if (ret < 0) {
+ dev_err(nor->dev, "error %d on ULBPR\n", ret);
+ return ret;
+ }
+
+ return spi_nor_wait_till_ready(nor);
+}
+
/* Used when the "_ext_id" is two bytes at most */
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
@@ -4506,6 +4542,15 @@ static int spi_nor_disable_block_protection(struct spi_nor *nor)
nor->params.disable_block_protection =
spi_nor_spansion_clear_sr_bp;
+ /*
+ * If the flash supports the Global Block-Protection Unlock command,
+ * use it for faster throughput: a single command cycle that unlocks
+ * the entire memory array.
+ */
+ if (nor->info->flags & UNLOCK_GLOBAL_BLOCK)
+ nor->params.disable_block_protection =
+ spi_nor_unlock_global_block_protection;
+
return nor->params.disable_block_protection(nor);
}
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a3a765c21edc..8c07b06ad0e8 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -66,6 +66,7 @@
#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
#define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
#define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
+#define SPINOR_OP_ULBPR 0x98 /* Global Block Unlock Protection */
/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
--
2.9.5
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] mtd: spi-nor: unlock global block protection on sst26vf064b
2019-08-23 16:05 [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 1/2] " Tudor.Ambarus
@ 2019-08-23 16:05 ` Tudor.Ambarus
2019-08-23 16:07 ` [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2 siblings, 0 replies; 4+ messages in thread
From: Tudor.Ambarus @ 2019-08-23 16:05 UTC (permalink / raw)
To: marek.vasut, vigneshr, boris.brezillon, miquel.raynal, richard,
linux-mtd, linux-kernel
Cc: Tudor.Ambarus
From: Tudor Ambarus <tudor.ambarus@microchip.com>
To avoid inadvertent writes during power-up, sst26vf064b is
write-protected by default after a power-on reset cycle.
Unlock the serial flash memory by using the Global Block Protection
Unlock command - it offers a single command cycle that unlocks
the entire memory array.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spi-nor.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 08ae45fdc44a..5c18fd0c7fd2 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2398,7 +2398,9 @@ static const struct flash_info spi_nor_ids[] = {
{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
{ "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, SECT_4K |
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
- { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ UNLOCK_GLOBAL_BLOCK) },
/* ST Microelectronics -- newer production may have feature updates */
{ "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) },
--
2.9.5
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support
2019-08-23 16:05 [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 1/2] " Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 2/2] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
@ 2019-08-23 16:07 ` Tudor.Ambarus
2 siblings, 0 replies; 4+ messages in thread
From: Tudor.Ambarus @ 2019-08-23 16:07 UTC (permalink / raw)
To: marek.vasut, vigneshr, boris.brezillon, miquel.raynal, richard,
linux-mtd, linux-kernel
This has nothing to do with the move manufacturer out of the spi-nor core
pursue, but depends on:
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=127030
On 08/23/2019 07:05 PM, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> This is similar with what other nor flashes are doing by clearing the
> block protection bits from the status register: disable the write
> protection after a power-on reset cycle.
>
> The Global Block-Protection Unlock command offers a single command cycle
> that unlocks the entire memory array. Prefer this method for higher
> throughput.
>
> Tested on the sst26vf064b flash using the atmel-quadspi driver.
>
> Tudor Ambarus (2):
> mtd: spi-nor: add Global Block Unlock support
> mtd: spi-nor: unlock global block protection on sst26vf064b
>
> drivers/mtd/spi-nor/spi-nor.c | 51 +++++++++++++++++++++++++++++++++++++++++--
> include/linux/mtd/spi-nor.h | 1 +
> 2 files changed, 50 insertions(+), 2 deletions(-)
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 4+ messages in thread
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