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* nand: Proper definition of "extra" OOB regions? (4x interleaved, then one bulk user)
@ 2019-06-13 19:32 Jeff Kletsky
       [not found] ` <CAJsYDVL6ykGPNiL0-8VdKfh8MkAPj3-SLSeUMqC1SSYX4_zX0A@mail.gmail.com>
  0 siblings, 1 reply; 2+ messages in thread
From: Jeff Kletsky @ 2019-06-13 19:32 UTC (permalink / raw)
  To: linux-mtd

TL;DR

I've been trying to track down the proper way to express the Paragon
SPI NAND's OOB "user" data segments, but am not clear how upper
layers interpret the combination of `mtd_ooblayout_ops.free` and the
overall OOB size, typically set through the `NAND_MEMORG` macro.

Rather than churn Patchwork and those that donate their time and
energy follow, review, and manage patches, would it be possible to
confirm that the last 64 bytes of this chip's user OOB, which
is not contiguous with any other user areas, should (or should not)
be defined in `.free` as a fifth section?

---

In the case of the Paragon chips, there is a total of 128 bytes of OOB,
split into a 4-byte BBM reservation, four repeats of 15-byte sections
with "factory" and "user" areas interleaved, then the remaining 64 bytes
available as a user area, not contiguous with other user areas[1].

0x800 -- 4 bytes BBM

0x804 -- 2 bytes user
0x806 -- 13 bytes factory ECC

0x813 -- 2 bytes user
0x815 -- 13 bytes factory ECC

0x822 -- 2 bytes user
0x824 -- 13 bytes factory ECC

0x831 -- 2 bytes user
0x833 -- 13 bytes factory ECC

0x840 -- 64 bytes user      <== this is the subject of the question

Clearly, the 4 regions of interleaved OOB data needs to be described
in both `.ecc` and `.free`. What isn't completely clear to me is the
remaining 64-byte area.

Is that the OOB area is defined as 128 bytes and that only 64 bytes
have been reserved sufficient, or should those 64 bytes, which
are not contiguous with any of the other "user" segments be a fifth
section in defining `.free`?


That the driver "works" without defining a fifth region in a specific,
UBI-based application doesn't assure me that it will work properly
in all applications with all upper-layer consumers.


Examining supported chips with similar OOB layouts with multiple
sections then an "additional" area, such as the GigaDevice GD5FxGQ4xA,
was not terribly insightful. The GD5F1GQ4UAY datasheet[2] marks the
upper 64-byte region as "reserved", in contrast to "User meta data"
and it is not described in the current `gigadevice.c`[3]. As such,
it isn't convincing evidence that it was omitted as "not required",
because it was marked "reserved", or perhaps for some other reason.


As a side note, the datasheet also marks the first byte of each region
as "reserved", which is not reflected in the current `gigadevice.c`,
which includes it in the free region for sections 1-3.


Thanks!

Jeff




[1]http://www.xtxtech.com/upfile/2016082517274590.pdf
     pg. 36

[2]https://datasheet4u.com/datasheet-pdf-file/791680/GigaDevice/GD5F1GQ4UAY/1
     pg. 33

[3]https://elixir.bootlin.com/linux/v5.2-rc4/source/drivers/mtd/nand/spi/gigadevice.c#L45


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* Re: nand: Proper definition of "extra" OOB regions? (4x interleaved,  then one bulk user)
       [not found] ` <CAJsYDVL6ykGPNiL0-8VdKfh8MkAPj3-SLSeUMqC1SSYX4_zX0A@mail.gmail.com>
@ 2019-06-14  2:54   ` Jeff Kletsky
  0 siblings, 0 replies; 2+ messages in thread
From: Jeff Kletsky @ 2019-06-14  2:54 UTC (permalink / raw)
  To: Chuanhong Guo, linux-mtd

On 6/13/19 6:12 PM, Chuanhong Guo wrote:

> Hi
>
> On Fri, Jun 14, 2019 at 3:33 AM Jeff Kletsky<lede@allycomm.com>  wrote:
>> [...]
>> Examining supported chips with similar OOB layouts with multiple
>> sections then an "additional" area, such as the GigaDevice GD5FxGQ4xA,
>> was not terribly insightful. The GD5F1GQ4UAY datasheet[2] marks the
>> upper 64-byte region as "reserved", in contrast to "User meta data"
>> and it is not described in the current `gigadevice.c`[3]. As such,
>> it isn't convincing evidence that it was omitted as "not required",
>> because it was marked "reserved", or perhaps for some other reason.
>>
>>
>> As a side note, the datasheet also marks the first byte of each region
>> as "reserved", which is not reflected in the current `gigadevice.c`,
>> which includes it in the free region for sections 1-3.
> The datasheet I found back then marked the first byte as "reserved for
> bad block mark" and the first 4 bytes of other regions are marked as
> "user meta data 1". And I wrote the ecc region code accordingly.
>
> I've put the one I found in the attachment.
>
> Regards,
> Chuanhong Guo

Thanks!

The datasheet kindly provided by Chuanhong Gou is labeled GD5F1GQ4UAYIG,
with a DID of 0xf1, matching the code in gigadevice.c.

It shows a 64-byte OOB area, verifying the correct layout in the code.

The one I referenced was labeled GD5F1GQ4UAY, which shows a 128-byte OOB.
The first 64 bytes organized nearly identically to the above, with
the remaining 64 bytes marked "Reserved".

The ordering information on both datasheets decodes the IG suffix as
Industrial,Green. This makes the two indistinguishable by appearance.
A chip sold as GD5F1GQ4UAYIG apparently could have been either variant.

Both datasheets on the "Read ID (9FH)" page show the DID to be 0xf1.

Contradicting itself, the 128-byte datasheet also gives a parenthetical
note on the "Commands Description" page with a DID of 0x10.

I'm just glad I wasn't dealing with these on a production run!


Jeff


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2019-06-13 19:32 nand: Proper definition of "extra" OOB regions? (4x interleaved, then one bulk user) Jeff Kletsky
     [not found] ` <CAJsYDVL6ykGPNiL0-8VdKfh8MkAPj3-SLSeUMqC1SSYX4_zX0A@mail.gmail.com>
2019-06-14  2:54   ` Jeff Kletsky

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