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From: Vignesh Raghavendra <vigneshr@ti.com>
To: <Tudor.Ambarus@microchip.com>, <boris.brezillon@collabora.com>,
	<marek.vasut@gmail.com>
Cc: richard@nod.at, linux-kernel@vger.kernel.org,
	boris.brezillon@bootlin.com, linux-mtd@lists.infradead.org,
	miquel.raynal@bootlin.com, computersforpeace@gmail.com,
	dwmw2@infradead.org
Subject: Re: [PATCH 6/6] mtd: spi-nor: Add the SPI_NOR_XSR_RDY flag
Date: Mon, 5 Aug 2019 10:44:13 +0530
Message-ID: <93dc5a5d-3a72-c80e-0b0d-7fd758a1ea5e@ti.com> (raw)
In-Reply-To: <20190731091145.27374-7-tudor.ambarus@microchip.com>



On 31/07/19 2:42 PM, Tudor.Ambarus@microchip.com wrote:
> From: Boris Brezillon <boris.brezillon@bootlin.com>
> 
> S3AN flashes use a specific opcode to read the status register.
> We currently use the SPI_S3AN flag to decide whether this specific
> SR read opcode should be used, but SPI_S3AN is about to disappear, so
> let's add a new flag.
> 

I think you can drop SPI_S3AN right away either as separate patch in
this series or as part of this patch itself.

Regards
Vignesh

> Note that we use the same bit as SPI_S3AN implies SPI_NOR_XSR_RDY and
> vice versa.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 5fea5d7ce2cb..01be6d49ce3b 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -213,6 +213,14 @@ struct flash_info {
>  					 * bit. Must be used with
>  					 * SPI_NOR_HAS_LOCK.
>  					 */
> +#define SPI_NOR_XSR_RDY		BIT(10)	/*
> +					 * S3AN flashes have specific opcode to
> +					 * read the status register.
> +					 * Flags SPI_NOR_XSR_RDY and SPI_S3AN
> +					 * use the same bit as one implies the
> +					 * other, but we will get rid of
> +					 * SPI_S3AN soon.
> +					 */
>  #define	SPI_S3AN		BIT(10)	/*
>  					 * Xilinx Spartan 3AN In-System Flash
>  					 * (MFR cannot be used for probing
> @@ -4818,7 +4826,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
>  	 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
>  	 * with Atmel spi-nor
>  	 */
> -	if (info->flags & SPI_S3AN)
> +	if (info->flags & SPI_NOR_XSR_RDY)
>  		nor->flags |=  SNOR_F_READY_XSR_RDY;
>  
>  	/* Kept only for backward compatibility purpose. */
> 

-- 
Regards
Vignesh

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Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-31  9:12 [PATCH 0/6] mtd: spi-nor: move manuf out of the core - batch 2 Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 1/6] mtd: spi-nor: Add post_sfdp() hook to tweak flash config Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 2/6] mtd: spi-nor: Add spansion_post_sfdp_fixups() Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 3/6] mtd: spi-nor: Add a ->convert_addr() method Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 4/6] mtd: spi_nor: Add nor->setup() method Tudor.Ambarus
2019-08-01  6:36   ` Boris Brezillon
2019-08-05  6:37     ` Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 5/6] mtd: spi-nor: Add s3an_post_sfdp_fixups() Tudor.Ambarus
2019-07-31 12:31   ` Naga Sureshkumar Relli
2019-07-31 12:38     ` Boris Brezillon
2019-08-01  4:47       ` Naga Sureshkumar Relli
2019-07-31 13:06     ` Tudor.Ambarus
2019-08-01  4:47       ` Naga Sureshkumar Relli
2019-08-01  6:42   ` Boris Brezillon
2019-08-05  6:40     ` Tudor.Ambarus
2019-07-31  9:12 ` [PATCH 6/6] mtd: spi-nor: Add the SPI_NOR_XSR_RDY flag Tudor.Ambarus
2019-08-05  5:14   ` Vignesh Raghavendra [this message]
2019-08-05  7:32     ` Tudor.Ambarus

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