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From: John Garry <john.garry@huawei.com>
To: Jungseung Lee <js07.lee@samsung.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <js07.lee@gmail.com>
Cc: chenxiang <chenxiang66@hisilicon.com>
Subject: Re: [PATCH v3 3/3] mtd: spi-nor: support lock/unlock for a few Micron chips
Date: Mon, 13 Jan 2020 13:00:06 +0000	[thread overview]
Message-ID: <97c5c844-13c5-cfad-158f-417947e44d0e@huawei.com> (raw)
In-Reply-To: <799d1e85197f328b05c112e42baf327248f9c9a7.camel@samsung.com>

On 13/01/2020 12:45, Jungseung Lee wrote:
> Hi, John
> 
> 2020-01-13 (Mon), 12:30 +0000, John Garry:
>> On 13/01/2020 05:59, Jungseung Lee wrote:
>>> Some Micron models are known to have lock/unlock support,
>>> and that also support 4bit block protection (bp0-3).
>>>
>>> This patch support lock/unlock feature on the flashes.
>>>
>>> Tested on w25q512ax3. The Other is modified following the
>>> datasheet.
>>>
>>> Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
>>> ---
>>>    drivers/mtd/spi-nor/spi-nor.c | 11 ++++++++---
>>>    1 file changed, 8 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-
>>> nor/spi-nor.c
>>> index 7e8af6c4fdfa..97a027c38d66 100644
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -2583,12 +2583,17 @@ static const struct flash_info
>>> spi_nor_ids[] = {
>>>    	{ "mt25ql512a",  INFO6(0x20ba20, 0x104400, 64 * 1024, 1024,
>>>    			       SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
>>>    			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES)
>>> },
>>> -	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K |
>>> USE_FSR | SPI_NOR_QUAD_READ) },
>>> +	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024,
>>> +			       SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
>>> +			       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
>>> +			       SPI_NOR_HAS_BP3 | SPI_NOR_BP3_SR_BIT6)
>>> },
>>>    	{ "mt25qu512a",  INFO6(0x20bb20, 0x104400, 64 * 1024, 1024,
>>>    			       SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
>>>    			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES)
>>> },
>>> -	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K |
>>> -			      USE_FSR | SPI_NOR_QUAD_READ) },
>>> +	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024,
>>> +			       SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
>>> +			       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
>>> +			       SPI_NOR_HAS_BP3 | SPI_NOR_BP3_SR_BIT6)
>>> },
>>>    	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K |
>>> USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>>>    	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K |
>>> USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>>>    	{ "mt25ql02g",   INFO(0x20ba22, 0, 64 * 1024, 4096,
>>>
>>
>> Hi,
>>
>> I'd like to test on a n25q128a11.
>>
> Thanks for your interest to my patches.
> 
>> Seems I just need to add "SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
>> 	
>> SPI_NOR_HAS_BP3 | SPI_NOR_BP3_SR_BIT6" to
>> n25q128a11 INFO also, right?
> You're right.
> 
>> Thanks,
>> John
>>
>>
> Best Regards,
> Jungseung Lee

OK, great. So from *limited* testing (which you can judge by my response 
time), this seems to work ok:

root@ubuntu:/home/john# sudo flash_lock -l /dev/mtd0
root@ubuntu:/home/john# sudo mtd_debug write /dev/mtd0 0x100000 4096 
dump4096
[  220.310538] spi-nor spi-PRP0001:00: Program operation failed.
[  220.316314] spi-nor spi-PRP0001:00: Attempted to modify a protected 
sector.
file_to_flash: write, size 0x1000, n 0x1000
write(): Input/output error
root@ubuntu:/home/john# sudo flash_lock -u /dev/mtd0
flash_lock: error!: could not unlock device: /dev/mtd0

             error 5 (Input/output error)
root@ubuntu:/home/john# sudo flash_lock -u /dev/mtd0
root@ubuntu:/home/john# sudo mtd_debug write /dev/mtd0 0x100000 4096 
dump4096
Copied 4096 bytes from dump4096 to address 0x00100000 in flash
root@ubuntu:/home/john#

This write to the bottom portion was previously passing (which was 
improper to do so). Note that the flash_lock -u error is a known issue.

I'll test further this/next week if I get a chance.

Thanks,
John



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  reply	other threads:[~2020-01-13 13:00 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20200113055910epcas1p4f97dfeb465b00d66649d6321cffc7b5a@epcas1p4.samsung.com>
2020-01-13  5:59 ` [PATCH v3 1/3] mtd: spi-nor: introduce SR_BP_SHIFT define Jungseung Lee
     [not found]   ` <CGME20200113055910epcas1p377b2618bea2ca860acac2b6f34e2b83e@epcas1p3.samsung.com>
2020-01-13  5:59     ` [PATCH v3 2/3] mtd: spi-nor: add 4bit block protection support Jungseung Lee
2020-01-14 10:49       ` Tudor.Ambarus
2020-01-17 15:06         ` Jungseung Lee
2020-01-22 11:42           ` Jungseung Lee
2020-01-22 14:31             ` Tudor.Ambarus
2020-01-22 17:14               ` Michael Walle
2020-01-23  3:59                 ` Jungseung Lee
2020-01-23  8:15                   ` Michael Walle
2020-02-11  7:52           ` chenxiang (M)
2020-03-04  5:20             ` Jungseung Lee
2020-03-04  8:36               ` chenxiang (M)
2020-03-07  7:40                 ` Jungseung Lee
2020-01-22 19:36       ` Michael Walle
2020-01-23  6:22         ` Jungseung Lee
2020-01-23  8:10           ` Michael Walle
2020-01-23  8:53             ` Jungseung Lee
2020-01-23  9:31               ` Michael Walle
2020-01-28 11:01                 ` Jungseung Lee
2020-01-28 12:29                   ` [SPAM] " Michael Walle
2020-01-30  8:17                     ` Jungseung Lee
2020-01-30  8:36                       ` [SPAM] " Michael Walle
2020-01-30 10:07                         ` Jungseung Lee
2020-02-03 13:56                       ` Vignesh Raghavendra
2020-02-03 14:38                         ` [SPAM] " Michael Walle
2020-02-03 14:58                           ` Jungseung Lee
2020-02-03 17:31                           ` Vignesh Raghavendra
2020-02-07 12:17                         ` Tudor.Ambarus
2020-02-10  8:33                           ` Michael Walle
2020-02-10  9:47                             ` Tudor.Ambarus
2020-02-10  9:59                               ` Tudor.Ambarus
2020-02-10 10:40                                 ` Michael Walle
2020-02-10 11:27                                   ` Tudor.Ambarus
2020-02-10 12:14                                     ` Michael Walle
2020-02-10 15:50                                       ` Tudor.Ambarus
2020-02-10 10:29                               ` Michael Walle
2020-02-10 11:26                                 ` Tudor.Ambarus
2020-02-19 10:50                                   ` Jungseung Lee
2020-02-19 11:08                                     ` Michael Walle
2020-02-19 11:23                                       ` Jungseung Lee
2020-02-19 11:36                                         ` Michael Walle
2020-02-20 19:09                                     ` Michael Walle
2020-02-21  9:30                                       ` Tudor.Ambarus
2020-02-25  8:20                                         ` Tudor.Ambarus
2020-02-25  9:25                                           ` Jungseung Lee
     [not found]   ` <CGME20200113055910epcas1p384c04182e7c643163d659d42fafd01b3@epcas1p3.samsung.com>
2020-01-13  5:59     ` [PATCH v3 3/3] mtd: spi-nor: support lock/unlock for a few Micron chips Jungseung Lee
2020-01-13 12:30       ` John Garry
2020-01-13 12:40         ` Jungseung Lee
2020-01-13 12:45         ` Jungseung Lee
2020-01-13 13:00           ` John Garry [this message]
2020-02-17  0:18   ` [PATCH v3 1/3] mtd: spi-nor: introduce SR_BP_SHIFT define Tudor.Ambarus

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