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Tue, 10 Sep 2019 19:38:23 -0700 (PDT) X-Gm-Message-State: APjAAAXZteaLCZKpQz/HZldmrKecAIVmHzhl46Jj5NLxMNMWswVzxD6V USztLj0RCiDrjggT+fGvqncVBwIw455u5rJuK7I= X-Google-Smtp-Source: APXvYqwVMpAGBP9ZGdeflRgNSfdoIpeK9RuiTyzaWElh1Uu6Vn8S2OVwOzzEoLHCiBvcHRI9SAzQptRMW33EuaC6e40= X-Received: by 2002:a67:dc86:: with SMTP id g6mr12744040vsk.181.1568169502363; Tue, 10 Sep 2019 19:38:22 -0700 (PDT) MIME-Version: 1.0 References: <5143724.5TqzkYX0oI@dabox> <3020870.hsMMj5ogRZ@dabox> <9bb2fb0e-a9e7-c389-f9b7-42367485ff83@kernel.org> In-Reply-To: <9bb2fb0e-a9e7-c389-f9b7-42367485ff83@kernel.org> From: Masahiro Yamada Date: Wed, 11 Sep 2019 11:37:46 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: mtd raw nand denali.c broken for Intel/Altera Cyclone V To: Dinh Nguyen X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190910_193841_476990_C0CB0FF4 X-CRM114-Status: GOOD ( 26.24 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vignesh Raghavendra , Richard Weinberger , Linux Kernel Mailing List , Marek Vasut , linux-mtd , Tim Sander , Miquel Raynal , Brian Norris , David Woodhouse Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi Dinh, On Wed, Sep 11, 2019 at 12:22 AM Dinh Nguyen wrote: > > > > On 9/10/19 8:48 AM, Tim Sander wrote: > > Hi > > > > I have noticed that my SPF records where not in place after moving the server, > > so it seems the mail didn't go to the mailing list. Hopefully that's fixed now. > > > > Am Dienstag, 10. September 2019, 09:16:37 CEST schrieb Masahiro Yamada: > >> On Fri, Sep 6, 2019 at 9:39 PM Tim Sander wrote: > >>> Hi > >>> > >>> I have noticed that there multiple breakages piling up for the denali nand > >>> driver on the Intel/Altera Cyclone V. Unfortunately i had no time to track > >>> the mainline kernel closely. So the breakage seems to pile up. I am a > >>> little disapointed that Intel is not on the lookout that the kernel works > >>> on the chips they are selling. I was really happy about the state of the > >>> platform before concerning mainline support. > >>> > >>> The failure starts with kernel 4.19 or stable kernel release 4.18.19. The > >>> commit is ba4a1b62a2d742df9e9c607ac53b3bf33496508f. > >> > >> Just for clarification, this corresponds to > >> 0d55c668b218a1db68b5044bce4de74e1bd0f0c8 upstream. > >> > >>> The problem here is that > >>> our platform works with a zero in the SPARE_AREA_SKIP_BYTES register. > >> > >> Please clarify the scope of "our platform". > >> (Only you, or your company, or every individual using this chip?) > > The company i work for uses this chip as a base for multiple products. > > > >> First, SPARE_AREA_SKIP_BYTES is not the property of the hardware. > >> Rather, it is about the OOB layout, in other words, this parameter > >> is defined by software. > >> > >> For example, U-Boot supports the Denali NAND driver. > >> The SPARE_AREA_SKIP_BYTES is a user-configurable parameter: > >> https://github.com/u-boot/u-boot/blob/v2019.10-rc3/drivers/mtd/nand/raw/Kcon > >> fig#L112 > >> > >> > >> Your platform works with a zero in the SPARE_AREA_SKIP_BYTES register > >> because the NAND chip on the board was initialized with a zero > >> set to the SPARE_AREA_SKIP_BYTES register. > >> > >> If the NAND chip had been initialized with 8 > >> set to the SPARE_AREA_SKIP_BYTES register, it would have > >> been working with 8 to the SPARE_AREA_SKIP_BYTES. > >> > >> The Boot ROM is the only (semi-)software that is unconfigurable by users, > >> so the value of SPARE_AREA_SKIP_BYTES should be aligned with > >> the boot ROM. > >> I recommend you to check the spec of the boot ROM. > > We boot from NOR flash. That's why i didn't see a problem booting probably. > > > >> (The maintainer of the platform, Dihn is CC'ed, > >> so I hope he will jump in) > > Yes i hope so too. > > > > I don't have access to a NAND device at the moment. I'll try to find one > and debug. > > Dinh Dinh, Do you have answers for the following questions? - Does the SOCFPGA boot ROM support the NAND boot mode? - If so, which value does it use for SPARE_AREA_SKIP_BYTES? -- Best Regards Masahiro Yamada ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/