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type=4; name=$KeepSent X-Mailer: Lotus Notes Release 8.5.3FP4 SHF90 June 10, 2013 Message-ID: From: masonccyang@mxic.com.tw Date: Wed, 15 May 2019 15:36:29 +0800 X-MIMETrack: Serialize by Router on MXML06C/TAIWAN/MXIC(Release 9.0.1FP10 HF265|July 25, 2018) at 2019/05/15 PM 03:36:28, Serialize complete at 2019/05/15 PM 03:36:28 X-MAIL: TWHMLLG3.macronix.com x4F7aS9F078422 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190515_003716_997251_080812F5 X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, christophe.kerello@st.com, bbrezillon@kernel.org, juliensu@mxic.com.tw, lee.jones@linaro.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-spi@vger.kernel.org, marcel.ziswiler@toradex.com, paul.burton@mips.com, broonie@kernel.org, geert@linux-m68k.org, stefan@agner.ch, linux-mtd@lists.infradead.org, richard@nod.at, liang.yang@amlogic.com, computersforpeace@gmail.com, dwmw2@infradead.org, marek.vasut@gmail.com, zhengxunli@mxic.com.tw Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi Miquel, > > +Macronix MX25F0A MultiFunction Device Tree Bindings > > +---------------------------------------------------- > > + > > +MX25F0A is a MultiFunction Device with SPI and raw NAND, which > > +supports either spi host controller or raw nand controller. > > Acronyms in plain English should be in upper case. okay, will fix. > > +Example: > > + > > + mxic: mx25f0a@43c30000 { > > + compatible = "mxic,mx25f0a"; > > + reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; > > + reg-names = "regs", "dirmap"; > > + > > + /* spi */ > > + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; > > + clock-names = "send_clk", "send_dly_clk", "ps_clk"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + flash@0 { > > + compatible = "jedec,spi-nor"; > > + reg = <0>; > > + spi-max-frequency = <25000000>; > > + spi-tx-bus-width = <4>; > > + spi-rx-bus-width = <4>; > > + }; > > + > > + /* nand */ > > + nand-ecc-mode = "soft"; > > + nand-ecc-algo = "bch"; > > + nand-ecc-step-size = <512>; > > + nand-ecc-strength = <8>; > > Any reason to enforce 512B/8b correction? Why not letting the core > choose for you depending on the NAND chip's requirements? > I thought here is just a raw NAND DTS example. Will remove it. > > Anyway, I think you can have only one or the other (NAND or SPI), not > both, and you probably should have a compatible or a property to tell > the kernel which one you are using, right? > yes, you are right. New DTS is bellow. --------------------------------------------------------------------------> Macronix Flash Memory Controller Device Tree Bindings ----------------------------------------------------- Macronix Flash Memory Controller supports serial and raw Flash, including NOR and NAND Flash for high throughput and low pin count applications. It's a MultiFunction Device which supports either SPI host controller or raw NAND controller. Required properties: - compatible: should be "mxic,mfd" - reg: should contain 2 entries, one for the registers and one for the direct mapping area in SPI mode. - reg-names: should contain "regs" and "dirmap" - interrupts: interrupt line connected to this controller - SPI: - #address-cells: should be 1 - #size-cells: should be 0 - clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk" - clocks: should contain 3 entries for the "ps_clk", "send_clk" and "send_dly_clk" clocks - Raw NAND: - nand-ecc-mode = "soft"; - nand-ecc-algo = "bch"; Example: - SPI mode: mxic: mxic-mfd@43c30000 { compatible = "mxic,mfd"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; clock-names = "send_clk", "send_dly_clk", "ps_clk"; #address-cells = <1>; #size-cells = <0>; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; }; }; - Raw NAND mode: mxic: mxic-mfd@43c30000 { compatible = "mxic,mfd"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; nand-ecc-mode = "soft"; nand-ecc-algo = "bch"; }; ---------------------------------------------------------------------< thanks for your review. best regards, Mason CONFIDENTIALITY NOTE: This e-mail and any attachments may contain confidential information and/or personal data, which is protected by applicable laws. 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