From: masonccyang@mxic.com.tw
To: "Miquel Raynal" <miquel.raynal@bootlin.com>
Cc: devicetree@vger.kernel.org, christophe.kerello@st.com,
vigneshr@ti.com, jianxin.pan@amlogic.com, bbrezillon@kernel.org,
juliensu@mxic.com.tw, lee.jones@linaro.org,
linux-kernel@vger.kernel.org, stefan@agner.ch,
paul@crapouillou.net, marek.vasut@gmail.com,
paul.burton@mips.com, broonie@kernel.org,
linux-mtd@lists.infradead.org, richard@nod.at,
anders.roxell@linaro.org, liang.yang@amlogic.com,
computersforpeace@gmail.com, dwmw2@infradead.org
Subject: Re: [PATCH v4 1/2] mtd: rawnand: Add Macronix Raw NAND controller
Date: Fri, 28 Jun 2019 16:31:16 +0800 [thread overview]
Message-ID: <OF2EDB7089.FAD92F61-ON48258427.002D122A-48258427.002ECEF3@mxic.com.tw> (raw)
In-Reply-To: <20190628091836.3148d450@xps13>
Hi Miquel,
> >
> > > > Add a driver for Macronix raw NAND controller.
> > >
> > > Could you pass userspace major MTD tests and can you
attach/mount/edit
> > > a UBI/UBIFS storage?
> >
> > mtd_debug passed and using dd utility to read and write
> > with md5sum checking passed.
>
> Please don't use dd, use nanddump/nandwrite/flasherase/nandbiterrs and
> run the other tests from the mtd-utils test suite (available in
> Buildroot for instance).
>
Got it.
But may I know why 'dd' utility is not preferences ?
I generate a random data file and write to Flash by
using dd with bs=page size and read data back from Flash.
Checking data by md5sum.
The write and read testing data size is easily adjustable.
> >
> > > > +static int mxic_nfc_clk_enable(struct mxic_nand_ctlr *nfc)
> > > > +{
> > > > + int ret;
> > > > +
> > > > + ret = clk_prepare_enable(nfc->send_clk);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + ret = clk_prepare_enable(nfc->send_dly_clk);
> > > > + if (ret)
> > > > + goto err_send_dly_clk;
> > >
> > > I'm not sure why you only enable 2 out of 3 clocks and also why ou
> > > handle two of them here (which is great, I prefer having a separate
> > > helper for that) and the other one elsewhere?
> > >
> >
> > send_clk and send_dly_clk are device domain clocks.
> >
> > send_clk is clock without phase delay to ps_clk, used for sending
device
> > signals except for SIO[7:0].
> > send_dly_clk is clock with phase delay to ps_clk, used for sending
> > SIO[7:0]
> >
> > ps_clk is system domain clock and it's a source clock of send_clk and
> > send_dly_clk.
>
> And why is that explaining the fact that you configure them in
> different places? You can explain this with a nice comment at the top
> of the function, but I would rather prefer that you handle all three
> clocks in one go if possible.
>
okay, will patch it.
> > > > +static int mxic_nfc_data_xfer(struct mxic_nand_ctlr *nfc, const
void
> > *txbuf,
> > > > + void *rxbuf, unsigned int len)
> > > > +{
> > > > + unsigned int pos = 0;
> > > > +
> > > > + while (pos < len) {
> > > > + unsigned int nbytes = len - pos;
> > > > + u32 data = 0xffffffff;
> > > > + u32 sts;
> > > > + int ret;
> > > > +
> > > > + if (nbytes > 4)
> > > > + nbytes = 4;
> > > > +
> > > > + if (txbuf)
> > > > + memcpy(&data, txbuf + pos, nbytes);
> > > > +
> > > > + ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
> > > > + sts & INT_TX_EMPTY, 0, USEC_PER_SEC);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + writel(data, nfc->regs + TXD(nbytes % 4));
> > > > +
> > > > + if (rxbuf) {
> > > > + ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
> > > > + sts & INT_TX_EMPTY, 0,
> > > > + USEC_PER_SEC);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + ret = readl_poll_timeout(nfc->regs + INT_STS, sts,
> > > > + sts & INT_RX_NOT_EMPTY, 0,
> > > > + USEC_PER_SEC);
> > > > + if (ret)
> > > > + return ret;
> > > > +
> > > > + data = readl(nfc->regs + RXD);
> > > > + data >>= (8 * (4 - nbytes));
> > > > + memcpy(rxbuf + pos, &data, nbytes);
> > > > + WARN_ON(readl(nfc->regs + INT_STS) & INT_RX_NOT_EMPTY);
> > > > + } else {
> > > > + readl(nfc->regs + RXD);
> > > > + }
> > > > + WARN_ON(readl(nfc->regs + INT_STS) & INT_RX_NOT_EMPTY);
> > >
> > > WARN_ON() is maybe a bit overkill here?
> >
> > should I remove it ?
>
> I would stick to regular dev_warn.
Got it, will patch it.
thanks & best regards,
Mason
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next prev parent reply other threads:[~2019-06-28 8:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-25 6:10 [PATCH v4 0/2] Add Macronix Raw NAND controller driver Mason Yang
2019-06-25 6:10 ` [PATCH v4 1/2] mtd: rawnand: Add Macronix Raw NAND controller Mason Yang
2019-06-27 17:36 ` Miquel Raynal
2019-06-28 6:01 ` masonccyang
2019-06-28 7:18 ` Miquel Raynal
2019-06-28 8:31 ` masonccyang [this message]
2019-06-28 8:44 ` Miquel Raynal
2019-07-03 3:03 ` masonccyang
2019-06-25 6:10 ` [PATCH v4 2/2] dt-bindings: mtd: Document Macronix raw NAND controller bindings Mason Yang
2019-06-27 17:26 ` Miquel Raynal
2019-06-28 6:48 ` masonccyang
2019-06-28 7:42 ` Miquel Raynal
2019-06-28 9:09 ` masonccyang
2019-06-28 9:12 ` Miquel Raynal
2019-06-28 9:23 ` masonccyang
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