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From: Chris Morgan <macromorgan@hotmail.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: Chris Morgan <macroalpha82@gmail.com>,
	linux-spi@vger.kernel.org, broonie@kernel.org,
	robh+dt@kernel.org, heiko@sntech.de, hjc@rock-chips.com,
	yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com
Subject: Re: [PATCH v3 1/4] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller
Date: Wed, 2 Jun 2021 09:49:03 -0500	[thread overview]
Message-ID: <SN6PR06MB534255670866AE01B41DC6F7A53D9@SN6PR06MB5342.namprd06.prod.outlook.com> (raw)
In-Reply-To: <e609752d-ac37-cbfe-2f53-e23c3bb1b4d8@gmail.com>

On Wed, Jun 02, 2021 at 10:13:35AM +0200, Johan Jonker wrote:
> Hi Chris,
> 
> Some comments. Have a look if it's useful.
> 

All comments are useful. Thank you for your input. :)

> ===
> About the title:
> 
> dt-bindings: spi: add Rockchip Serial Flash Controller
> 
> Include a driver group name.
> Start with a verb.
> No need to mention "bindings" twice.
> 
> ===
> 
> In order to get this patch reviewed by rob+dt you must include:
> devicetree@vger.kernel.org
> 
> Check your review status here:
> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fdevicetree-bindings%2Flist%2F&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210841031%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=KhqRF2ly0Smf%2F1aE7yTrJ4FO5XPldagRW1gI8RF515E%3D&amp;reserved=0
> 
> Get the other lists and maintainers with:
> ./scripts/get_maintainer.pl --noroles --norolestats --nogit-fallback
> --nogit <patch1> <patch2>

Thank you, for now I've just been using the get_maintainer.pl and trying
not to bother too many people. I'll do this though going forward.

> 
> ===
> 
> Check document with:
> 
> make ARCH=arm dt_binding_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/rockchip-sfc.yaml
> 
> make ARCH=arm dtbs_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/rockchip-sfc.yaml
> 
> make ARCH=arm64 dtbs_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/rockchip-sfc.yaml
> 
> Remove any errors before submitting.
> 
> ===
> 
> In this serie you are introducing 4 new compatible strings, then also
> add 4 entries to dtsi files for the completeness.
> Could you give us a complete package?
> 
> rockchip,px30-sfc
> rockchip,rk3036-sfc
> rockchip,rk3308-sfc
> rockchip,rv1108-sfc
> 

Excluding the px30 I will not be able to test these. Should I just update
the compatible strings and clock names then?

> ARM: dts: rockchip: add sfc node for rv1108
> Copy node from manufacturer tree in rv1108.dtsi
> 
> ARM: dts: rockchip: add sfc node for rk3036
> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Frockchip-linux%2Fkernel%2Fcommit%2F57bfc68e70cb58bd4786a6baff6315f252a19088&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210841031%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=C5k6bCkt8qlzOquK9rECDN9fTK6HQDzxTR4Vp4othtA%3D&amp;reserved=0
> 
> arm64: dts: rockchip: add sfc node for PX30
> 
> arm64: dts: rockchip: add sfc node for rk3308
> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Frockchip-linux%2Fkernel%2Fcommit%2F036e7e07a41c264a076c70ebf20cfeca031799a0&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210841031%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=NAdFO27S6zQdSjG%2FHMdZfe%2Bx9Nh9VQJhGVAhTopFY7s%3D&amp;reserved=0
> 
> Fix there commit message and clock names.
> 
> ===
> 
> Johan
> 
> On 6/1/21 10:10 PM, Chris Morgan wrote:
> > From: Chris Morgan <macromorgan@hotmail.com>
> > 
> > Add bindings for the Rockchip serial flash controller. New device
> > specific parameter of rockchip,sfc-no-dma included in documentation.
> > 
> > Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> > ---
> >  .../devicetree/bindings/spi/rockchip,sfc.yaml | 87 +++++++++++++++++++
> >  1 file changed, 87 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/spi/rockchip,sfc.yaml
> > 
> 
> > diff --git a/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml b/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml
> > new file mode 100644
> > index 000000000000..d5f8edd621ae
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/rockchip,sfc.yaml
> > @@ -0,0 +1,87 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fspi%2Frockchip%2Csfc.yaml%23&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210841031%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=RvUO4cmMOZb9B5l2MtUK3riDKebGLlKWt0KnnKaqENQ%3D&amp;reserved=0
> 
> rockchip-sfc.yaml
> 
> The comma is only used between <manufacturer>,<SoC name>-<function> I think.
> Ask a maintainer for exact name.

I was basing this off of names like renesas,rspi.yaml and cdns,qspi-nor.yaml,
but this is probably a good question for the maintainers.

> 
> 
> > +$schema: https://na01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210841031%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=OSRmMArQEVaWsZ%2BnxrqvfmO1pWk6dyjWVTunbw6j1Po%3D&amp;reserved=0
> > +
> > +title: Rockchip Serial Flash Controller (SFC)
> > +
> > +maintainers:
> 
> > +  - Heiko Stuebner <heiko@sntech.de>
> > +  - Chris Morgan <macromorgan@hotmail.com>
> 
> sort
> no hotmail because it screws the message-ID

Is that a hard and fast rule? The Hotmail address I will be able to
respond to much quicker. I've actually had that address since before
they got bought by Microsoft. Worst case I can do the gmail I submit
patches from, though, but Hotmail is still preferred by me.

> 
> > +
> > +allOf:
> > +  - $ref: spi-controller.yaml#
> > +
> > +properties:
> > +  compatible:
> 
> > +    oneOf:
> 
> This format is wrong. Use fall back strings.
> 

Thank you, I was confused on this one section. I'll try to clean it up
more.

> > +      - const: rockchip,px30-sfc
> 
> > +      - const: rockchip,rk1806-sfc
> > +      - const: rockchip,rk1808-sfc
> > +      - const: rockchip,rk312x-sfc
> 
> remove
> I would advice against introducing compatible strings for boards that we
> don't have support for in mainline. Limit to things that we know what
> they look like.

I was under the impression these were also supported by upstream, but I'll
remove them if they aren't.

> 
> > +      - const: rockchip,rk3308-sfc
> > +      - const: rockchip,rv1108-sfc
> > +      - items:
> > +          - const: rockchip,rk3036-sfc
> 
>     oneOf:
>       - const: rockchip,rk3036-sfc
>       - items:
>           - enum:
>               - rockchip,px30-sfc
>               - rockchip,rk3308-sfc
>               - rockchip,rv1108-sfc
>           - const: rockchip,rk3036-sfc
> 
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> 
> > +      - description: Bus Clock
> > +      - description: Module Clock
> 
> swap
> 
> > +
> > +  clock-names:
> > +    items:
> 
> > +      - const: ahb
> > +      - const: sfc
> 
> swap
> You must keep them in the same order as in your example and in the dtsi
> files (both mainline as manufacturer tree).
> 
> Maybe use this:
> 
>       - const: clk
>       - const: hclk

Heiko suggested we use clk and ahb as the clock names, to be consistent
with the NAND flash controller hardware.

> 
> 
> #define HCLK_SFC		257
> #define SCLK_SFC		58
> 
> 	COMPOSITE(SCLK_SFC, "clk_sfc", mux_gpll_cpll_p, 0,
> 			PX30_CLKSEL_CON(22), 7, 1, MFLAGS, 0, 7, DFLAGS,
> 			PX30_CLKGATE_CON(6), 7, GFLAGS),
> 
> 	GATE(HCLK_SFC, "hclk_sfc", "hclk_mmc_nand", 0, PX30_CLKGATE_CON(6), 11,
> GFLAGS),
> 
> ===
> 
> From clk-rk3036.c:
> 
> 	COMPOSITE(SCLK_SFC, "sclk_sfc", mux_pll_src_apll_dpll_gpll_usb480m_p, 0,
> 			RK2928_CLKSEL_CON(16), 0, 2, MFLAGS, 2, 5, DFLAGS,
> 			RK2928_CLKGATE_CON(10), 5, GFLAGS),
> 
> 
> 	GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED,
> RK2928_CLKGATE_CON(3), 14, GFLAGS),
> 
> The HCLK_SFC is missing and ignored in rk3036-cru.h and clk-rk3036.c
> Maybe this needs a fix?

It possibly does, but aside from hoping that I'm doing it right I lack the
necessary hardware to test the changes. I can make educated guesses though
by looking at the datasheet and board support package kernel.

> 
> #define HCLK_SFC		454
> 
> See:
> clk: rockchip: rk3036: export the sfc clocks
> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Frockchip-linux%2Fkernel%2Fcommit%2F8373cf713ddd32037dc86462cac2d2d3cc859a99&amp;data=04%7C01%7C%7Cbadb9f60f0114af4d80308d9259e53f6%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637582184210851028%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=KZiR3s3opSYS6uplRJ%2B726qiFWY5tEfvo6GKAp4w81A%3D&amp;reserved=0
> 
> Maybe add more patches to your serie? ;)
> 
> ===
> 
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  rockchip,sfc-no-dma:
> 
> > +    vendor,bool-property:
> 
> remove
> See example vendor,bool-property at:
> Documentation/devicetree/bindings/example-schema.yaml
> 
> > +      descrption: Boolean value for disabling DMA
> 
> description:
> 
> > +      type: boolean
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - clocks
> > +  - clock-names
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/px30-cru.h>
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> 
>     #include <dt-bindings/power/px30-power.h>
> 
> > +
> > +    sfc: spi@ff3a0000 {
> > +        compatible = "rockchip,px30-sfc","rockchip,rk3036-sfc";
> > +        reg = <0x0 0xff3a0000 0x0 0x4000>;
> > +        interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> > +        clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> > +        clock-names = "sfc", "ahb";
> > +        pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
> > +        pinctrl-names = "default";
> 
> > +        power-domains = <&power PX30_PD_MMC_NAND>;
> 
> Add include for PX30_PD_MMC_NAND.
> 
> Check your example with scripts before you submit!
> 
> > +        #address-cells = <1>;
> > +        #size-cells = <0>;
> > +
> 
> > +        flash@0 {
> 
> This controller handles only serial flash for now.
> So limit that with patternProperties.
> Also users can't add more then 4 subnodes.
> That's where these documents are for, so add!
> 
> 
> > +            compatible = "jedec,spi-nor";
> 
> > +            reg = <0>;
> 
>             spi-max-frequency = <108000000>;
> 
> > +            spi-rx-bus-width = <2>;
> > +            spi-tx-bus-width = <2>;
> 
> The sort order is:
> compatible
> reg
> interrupts
> the rest in alphabetical order
> (no status in YAML examples)
> 
> 
> > +        };
> > +    };
> > +
> > +...
> > 

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  reply	other threads:[~2021-06-02 14:50 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 20:10 [PATCH v3 0/4] Add Rockchip SFC(serial flash controller) support Chris Morgan
2021-06-01 20:10 ` [PATCH v3 1/4] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Chris Morgan
2021-06-02  8:13   ` Johan Jonker
2021-06-02 14:49     ` Chris Morgan [this message]
2021-06-01 20:10 ` [PATCH v3 2/4] spi: rockchip-sfc: add rockchip serial flash controller driver Chris Morgan
2021-06-02 16:03   ` Mark Brown
2021-06-01 20:10 ` [PATCH v3 3/4] arm64: dts: rockchip: Add SFC to PX30 Chris Morgan
2021-06-01 20:10 ` [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Chris Morgan

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