From: Ashish Kumar <ashish.kumar@nxp.com>
To: Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: Richard Weinberger <richard@nod.at>,
John Garry <john.garry@huawei.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>
Subject: RE: [EXT] [PATCH 1/3] mtd: spi-nor: Split mt25qu512a (n25q512a) entry into two
Date: Thu, 5 Dec 2019 07:24:14 +0000 [thread overview]
Message-ID: <VI1PR04MB40154C771556031768A4D48D955C0@VI1PR04MB4015.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20191205065935.5727-2-vigneshr@ti.com>
Hi Vignesh,
> -----Original Message-----
> From: Vignesh Raghavendra <vigneshr@ti.com>
> Sent: Thursday, December 5, 2019 12:30 PM
> To: Tudor Ambarus <tudor.ambarus@microchip.com>
> Cc: Miquel Raynal <miquel.raynal@bootlin.com>; Richard Weinberger
> <richard@nod.at>; Vignesh Raghavendra <vigneshr@ti.com>; Ashish Kumar
> <ashish.kumar@nxp.com>; linux-mtd@lists.infradead.org; linux-
> kernel@vger.kernel.org; John Garry <john.garry@huawei.com>
> Subject: [EXT] [PATCH 1/3] mtd: spi-nor: Split mt25qu512a (n25q512a) entry
> into two
>
> Caution: EXT Email
>
> mt25q family is different from n25q family of devices, even though manf ID
> and device IDs are same. mt25q flash has bit 6 set in 5th byte of READ ID
> response which can be used to distinguish it from n25q variant.
> mt25q flashes support stateless 4 Byte addressing opcodes where as n25q
> flashes don't. Therefore, have two separate entries for mt25qu512a and
> n25q512a.
>
> Fixes: 9607af6f857f ("mtd: spi-nor: Rename "n25q512a" to "mt25qu512a
> (n25q512a)"")
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index f4afe123e9dc..01efea022990 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2459,15 +2459,16 @@ static const struct flash_info spi_nor_ids[] = {
> { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K |
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K |
> SPI_NOR_QUAD_READ) },
> { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR |
> SPI_NOR_QUAD_READ) },
> + { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024,
> + SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
> + SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
It seems you have moved back to my original patch [1], wrt mt25qu512a.
Regards
Ashish
> + { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K |
> + SPI_NOR_QUAD_READ) },
> { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
> SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
> SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096,
> SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
> NO_CHIP_ERASE) },
> - { "mt25qu512a (n25q512a)", INFO(0x20bb20, 0, 64 * 1024, 1024,
> - SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
> - SPI_NOR_QUAD_READ |
> - SPI_NOR_4B_OPCODES) },
> { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR |
> SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>
> /* Micron */
> --
> 2.24.0
[1]: http://patchwork.ozlabs.org/patch/1146197/
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2019-12-05 7:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-05 6:59 [PATCH 0/3] mtd: spi-nor: Update mt25q/n25q entries Vignesh Raghavendra
2019-12-05 6:59 ` [PATCH 1/3] mtd: spi-nor: Split mt25qu512a (n25q512a) entry into two Vignesh Raghavendra
2019-12-05 7:24 ` Ashish Kumar [this message]
2019-12-06 9:32 ` [EXT] " Vignesh Raghavendra
2019-12-05 6:59 ` [PATCH 2/3] mtd: spi-nor: Add entries for mt25q variants Vignesh Raghavendra
2019-12-05 6:59 ` [PATCH 3/3] mtd: spi-nor: Add USE_FSR flag for n25q* entries Vignesh Raghavendra
2019-12-05 11:21 ` John Garry
2019-12-10 16:41 ` Tudor.Ambarus
2019-12-12 7:31 ` Vignesh Raghavendra
2019-12-24 9:05 ` [PATCH 0/3] mtd: spi-nor: Update mt25q/n25q entries Tudor.Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=VI1PR04MB40154C771556031768A4D48D955C0@VI1PR04MB4015.eurprd04.prod.outlook.com \
--to=ashish.kumar@nxp.com \
--cc=john.garry@huawei.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=tudor.ambarus@microchip.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).