From: Greg Ungerer <gerg@kernel.org>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>,
s.hauer@pengutronix.de,
Michael Nazzareno Trimarchi <michael@amarulasolutions.com>,
linux-mtd@lists.infradead.org,
Boris Brezillon <bbrezillon@kernel.org>
Subject: Re: GPMI iMX6ull timeout on DMA
Date: Fri, 9 Aug 2019 23:57:08 +1000 [thread overview]
Message-ID: <c5af9334-f679-6fc9-4d2a-1366a295598a@kernel.org> (raw)
In-Reply-To: <20190809093235.09d89e20@collabora.com>
[-- Attachment #1: Type: text/plain, Size: 5440 bytes --]
Hi Boris,
On 9/8/19 5:32 pm, Boris Brezillon wrote:
> On Fri, 9 Aug 2019 16:55:22 +1000
> Greg Ungerer <gerg@kernel.org> wrote:
>> On 9/8/19 4:23 pm, Boris Brezillon wrote:
>>> On Fri, 9 Aug 2019 15:20:52 +1000
>>> Greg Ungerer <gerg@kernel.org> wrote:
>>>> On 9/8/19 2:36 am, Boris Brezillon wrote:
>>>>> On Mon, 5 Aug 2019 15:51:05 +1000
>>>>> Greg Ungerer <gerg@kernel.org> wrote:
>>>>>> On 2/8/19 10:51 pm, Boris Brezillon wrote:
>>>>>>> On Fri, 2 Aug 2019 22:34:57 +1000
>>>>>>> Greg Ungerer <gerg@kernel.org> wrote:
>>>>>>>> On 31/7/19 4:28 pm, Boris Brezillon wrote:
>>>>>>>>> On Wed, 31 Jul 2019 12:05:44 +1000
>>>>>>>>> Greg Ungerer <gerg@kernel.org> wrote:
>>>>>>>>>> On 30/7/19 6:38 pm, Miquel Raynal wrote:
>>>>>>>>>>> Greg Ungerer <gerg@kernel.org> wrote on Tue, 30 Jul 2019 16:06:55 +1000:
>>>>>>>>>>>> On 30/7/19 10:41 am, Greg Ungerer wrote:
>>>>>>>>>>>>> On 30/7/19 10:28 am, Greg Ungerer wrote:
>>>>>>>>>>>>>> On 29/7/19 10:47 pm, Miquel Raynal wrote:
>>>>>>>>>>>>>>> Greg Ungerer <gerg@kernel.org> wrote on Mon, 29 Jul 2019 22:33:56 +1000:
>>>>>>>>>>>>>>>> On 29/7/19 6:36 pm, Miquel Raynal wrote:
>>>>>>>>>>>>>>>>> Greg Ungerer <gerg@kernel.org> wrote on Mon, 29 Jul 2019 16:41:51 +1000:
>>>>>>>>>>>>> [snip]
>>>>>>>>>> Note that this was generated on a normal boot up (not failure).
>>>>>>>>>
>>>>>>>>> The values looks good. Can you try with the below diff applied?
>>>>>>>>> --->8---
>>>>>>>>> diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
>>>>>>>>> index 334fe3130285..9771f6a82abe 100644
>>>>>>>>> --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
>>>>>>>>> +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
>>>>>>>>> @@ -721,12 +721,10 @@ static void gpmi_nfc_apply_timings(struct gpmi_nand_data *this)
>>>>>>>>> writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET);
>>>>>>>>>
>>>>>>>>> /* Wait 64 clock cycles before using the GPMI after enabling the DLL */
>>>>>>>>> - dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64;
>>>>>>>>> - if (!dll_wait_time_us)
>>>>>>>>> - dll_wait_time_us = 1;
>>>>>>>>> + dll_wait_time_us = DIV_ROUND_UP(USEC_PER_SEC * 64, hw->clk_rate);
>>>>>>>>>
>>>>>>>>> /* Wait for the DLL to settle. */
>>>>>>>>> - udelay(dll_wait_time_us);
>>>>>>>>> + usleep_range(dll_wait_time_us, dll_wait_time_us * 10);
>>>>>>>>> }
>>>>>>>>>
>>>>>>>>> static int gpmi_setup_data_interface(struct nand_chip *chip, int chipnr,
>>>>>>>>
>>>>>>>> Eventually it failed, in the same way with with same errors.
>>>>>>>> Took quite a while, over 600 boot cycles.
>>>>>>>>
>>>>>>>> Note also that I had to hand merge the changes, since in 5.1.14 that
>>>>>>>> gpmi_nfc_apply_timings() is in gpmi-lib.c. But it was trivial to do.
>>>>>>>
>>>>>>> Oh well. I guess the next thing to do would be to dump the timing regs
>>>>>>> and clk rate that are set by the bootloader (before the driver override
>>>>>>> them) or those applied by an older kernel (one that didn't have that
>>>>>>> issue).
>>>>>>
>>>>>> Is this useful?
>>>>>
>>>>> Hm, looks like it's configured in mode 0, so no, it's not super useful.
>>>>> Can you try booting an older kernel (one that didn't have the
>>>>> ->setup_data_interface() hook implemented).
>>>>
>>>> Ok. I went back from 5.1 and the first kernel I could find that
>>>> returned no grep hits for "setup_data_interface" was 4.16.
>>>>
>>>> So I built for my target with that and added similar trace to dump
>>>> the hardware register settings for that. Debug output looks like
>>>> this now for it:
>>>>
>>>> ...
>>>> drivers/mtd/nand/gpmi-nand/gpmi-nand.c(807): gpmi_get_clks()
>>>> clk_get_rate(r->clock[0])=22000000
>>>> drivers/mtd/nand/gpmi-nand/gpmi-lib.c(1054): gpmi_begin()
>>>> HW_GPMI_TIMING0=0x00010203
>>>> HW_GPMI_TIMING1=0x05000000
>>>> nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
>>>> nand: Micron MT29F2G08ABAEAWP
>>>> nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
>>>> drivers/mtd/nand/gpmi-nand/gpmi-lib.c(966): enable_edo_mode()
>>>> clk_get_rate(r->clock[0])=99000000
>>>> gpmi-nand 1806000.gpmi-nand: enable the asynchronous EDO mode 5
>>>> drivers/mtd/nand/gpmi-nand/gpmi-lib.c(1054): gpmi_begin()
>>>> HW_GPMI_TIMING0=0x00010101
>>>
>>> TIMING0 match the one you have with 5.1 kernels.
>>>
>>>> HW_GPMI_TIMING1=0x90000000
>>>
>>> And we even have a bigger timeout value in 5.1 (0xe0000000), so we
>>> should be all safe WRT to timings in TIMING{0,1}.
>>>
>>> Can you dump CTRL1?
>>
>> drivers/mtd/nand/gpmi-nand/gpmi-lib.c(1054): gpmi_begin()
>> HW_GPMI_TIMING0=0x00010101
>> HW_GPMI_TIMING1=0x90000000
>> HW_GPMI_CTRL1_SET=0x01c4800c
>
> The read/write delay fields seem to match, but there are a few more
> fields set in this version:
> - DECOUPLE_CS
> - BCH_MODE
> - DEV_RESET
> - CTRL1_ATA_IRQRDY_POLARITY__ACTIVEHIGH
>
> Looks like those fields are not explicitly set in the gpmi_begin()
> patch, but maybe you dumped CTRL1. Would you mind sharing your patch?
Attached.
> If I'm right and you indeed dumped CTRL1, it might be worth doing the
> same in your 5.1 kernel so we can more easily compare those dumps.
> While at it, can you dump CTRL1 before and after applying the changes?
Will do. I am out of my lab for the weekend, but I'll get
those numbers first thing Monday morning.
Regards
Greg
[-- Attachment #2: gpmi-416.patch --]
[-- Type: text/x-patch, Size: 2481 bytes --]
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -963,6 +963,7 @@ static int enable_edo_mode(struct gpmi_n
unsigned long rate;
int ret;
+printk("%s(%d): enable_edo_mode()\n", __FILE__, __LINE__);
feature = kzalloc(ONFI_SUBFEATURE_PARAM_LEN, GFP_KERNEL);
if (!feature)
return -ENOMEM;
@@ -988,6 +989,7 @@ static int enable_edo_mode(struct gpmi_n
/* [3] set the main IO clock, 100MHz for mode 5, 80MHz for mode 4. */
rate = (mode == 5) ? 100000000 : 80000000;
clk_set_rate(r->clock[0], rate);
+printk(" clk_get_rate(r->clock[0])=%ld\n", clk_get_rate(r->clock[0]));
/* Let the gpmi_begin() re-compute the timing again. */
this->flags &= ~GPMI_TIMING_INIT_OK;
@@ -1049,6 +1051,7 @@ void gpmi_begin(struct gpmi_nand_data *t
return;
this->flags |= GPMI_TIMING_INIT_OK;
+printk("%s(%d): gpmi_begin()\n", __FILE__, __LINE__);
if (this->flags & GPMI_ASYNC_EDO_ENABLED)
gpmi_compute_edo_timing(this, &hw);
else
@@ -1060,10 +1063,12 @@ void gpmi_begin(struct gpmi_nand_data *t
BF_GPMI_TIMING0_DATA_SETUP(hw.data_setup_in_cycles);
writel(reg, gpmi_regs + HW_GPMI_TIMING0);
+printk(" HW_GPMI_TIMING0=0x%08x\n", readl(gpmi_regs + HW_GPMI_TIMING0));
/* [2] Set HW_GPMI_TIMING1 */
writel(BF_GPMI_TIMING1_BUSY_TIMEOUT(hw.device_busy_timeout),
gpmi_regs + HW_GPMI_TIMING1);
+printk(" HW_GPMI_TIMING1=0x%08x\n", readl(gpmi_regs + HW_GPMI_TIMING1));
/* [3] The following code is to set the HW_GPMI_CTRL1. */
@@ -1088,6 +1093,7 @@ void gpmi_begin(struct gpmi_nand_data *t
| BF_GPMI_CTRL1_RDN_DELAY(hw.sample_delay_factor);
writel(reg, gpmi_regs + HW_GPMI_CTRL1_SET);
+printk(" HW_GPMI_CTRL1_SET=0x%08x\n", readl(gpmi_regs + HW_GPMI_CTRL1_SET));
/* At last, we enable the DLL. */
writel(BM_GPMI_CTRL1_DLL_ENABLE, gpmi_regs + HW_GPMI_CTRL1_SET);
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -804,6 +804,7 @@ static int gpmi_get_clks(struct gpmi_nan
struct clk *clk;
int err, i;
+printk("%s(%d): gpmi_get_clks()\n", __FILE__, __LINE__);
for (i = 0; i < this->devdata->clks_count; i++) {
clk = devm_clk_get(this->dev, this->devdata->clks[i]);
if (IS_ERR(clk)) {
@@ -822,6 +823,7 @@ static int gpmi_get_clks(struct gpmi_nan
* Synchronous Mode, you should change the clock as you need.
*/
clk_set_rate(r->clock[0], 22000000);
+printk(" clk_get_rate(r->clock[0])=%ld\n", clk_get_rate(r->clock[0]));
return 0;
[-- Attachment #3: Type: text/plain, Size: 144 bytes --]
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next prev parent reply other threads:[~2019-08-09 13:57 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-29 6:41 GPMI iMX6ull timeout on DMA Greg Ungerer
2019-07-29 8:36 ` Miquel Raynal
2019-07-29 8:42 ` Michael Nazzareno Trimarchi
2019-07-29 12:18 ` Greg Ungerer
2019-07-29 12:20 ` Michael Nazzareno Trimarchi
2019-07-29 12:33 ` Greg Ungerer
2019-07-29 12:47 ` Miquel Raynal
2019-07-29 12:49 ` Michael Nazzareno Trimarchi
2019-07-29 12:55 ` Miquel Raynal
2019-07-29 13:00 ` Michael Nazzareno Trimarchi
2019-07-29 13:22 ` Miquel Raynal
2019-07-29 20:00 ` Michael Nazzareno Trimarchi
2019-07-29 21:02 ` Miquel Raynal
2019-07-30 0:28 ` Greg Ungerer
2019-07-30 0:41 ` Greg Ungerer
2019-07-30 6:06 ` Greg Ungerer
2019-07-30 8:38 ` Miquel Raynal
2019-07-30 8:58 ` Boris Brezillon
2019-07-31 2:05 ` Greg Ungerer
2019-07-31 6:28 ` Boris Brezillon
2019-08-02 7:19 ` Greg Ungerer
2019-08-02 12:34 ` Greg Ungerer
2019-08-02 12:51 ` Boris Brezillon
2019-08-05 5:51 ` Greg Ungerer
2019-08-07 16:05 ` Miquel Raynal
2019-08-08 0:43 ` Greg Ungerer
2019-08-08 16:36 ` Boris Brezillon
2019-08-09 5:20 ` Greg Ungerer
2019-08-09 6:23 ` Boris Brezillon
2019-08-09 6:55 ` Greg Ungerer
2019-08-09 7:32 ` Boris Brezillon
2019-08-09 13:57 ` Greg Ungerer [this message]
2019-08-09 13:59 ` Boris Brezillon
2019-08-12 2:50 ` Greg Ungerer
2019-08-12 4:04 ` Greg Ungerer
2019-08-12 7:31 ` Boris Brezillon
2019-08-13 0:50 ` Greg Ungerer
2021-01-28 9:45 ` Michael Nazzareno Trimarchi
2021-01-28 10:26 ` Miquel Raynal
2021-01-28 10:35 ` Michael Nazzareno Trimarchi
2021-01-28 11:55 ` Michael Nazzareno Trimarchi
2021-01-29 12:43 ` Greg Ungerer
2021-01-30 9:41 ` Michael Nazzareno Trimarchi
2021-02-01 14:13 ` Miquel Raynal
2021-02-01 14:32 ` Michael Nazzareno Trimarchi
2021-02-01 15:08 ` Michael Nazzareno Trimarchi
2021-02-01 15:14 ` Miquel Raynal
2021-02-01 15:17 ` Michael Nazzareno Trimarchi
2021-10-15 20:05 ` Michael Trimarchi
2021-10-15 20:12 ` Michael Nazzareno Trimarchi
2021-10-18 7:19 ` Miquel Raynal
2021-10-18 7:33 ` Michael Nazzareno Trimarchi
2021-10-18 7:43 ` Miquel Raynal
2021-10-04 5:54 ` Christian Eggers
2021-10-04 6:27 ` Michael Nazzareno Trimarchi
2021-10-04 15:33 ` Miquel Raynal
2021-10-04 16:06 ` Han Xu
2021-10-05 6:02 ` Christian Eggers
2021-10-08 9:55 ` Christian Eggers
2021-10-08 12:08 ` Stefan Riedmüller
2021-10-08 12:27 ` Miquel Raynal
2021-10-08 13:11 ` Christian Eggers
2021-10-08 13:29 ` Miquel Raynal
2021-10-08 13:36 ` Miquel Raynal
2021-10-08 13:49 ` Christian Eggers
2021-10-08 16:07 ` Miquel Raynal
2021-10-09 5:53 ` Michael Nazzareno Trimarchi
2021-10-11 6:46 ` Miquel Raynal
2021-10-12 9:02 ` [RFC PATCH 1/2] mtd: rawnand: gpmi: Remove explicit default gpmi clock setting for i.MX6 Stefan Riedmueller
2021-10-12 9:02 ` [RFC PATCH 2/2] gpmi-nand: Add ERR007117 protection for nfc_apply_timings Stefan Riedmueller
2021-10-13 5:01 ` Han Xu
2021-10-22 8:45 ` Stefan Riedmüller
2021-10-22 14:35 ` han.xu
2021-10-25 9:39 ` Stefan Riedmüller
2021-10-28 9:28 ` Stefan Riedmüller
2021-11-01 4:01 ` han.xu
2021-10-13 6:10 ` Christian Eggers
2021-10-13 6:00 ` [RFC PATCH 1/2] mtd: rawnand: gpmi: Remove explicit default gpmi clock setting for i.MX6 Christian Eggers
2021-10-09 6:26 ` GPMI iMX6ull timeout on DMA Christian Eggers
2021-10-13 6:15 ` Christian Eggers
2021-10-08 13:13 ` Christian Eggers
2021-10-08 13:30 ` Miquel Raynal
2021-10-09 6:33 ` Christian Eggers
-- strict thread matches above, loose matches on Subject: below --
2018-10-02 13:22 GPMI IMX6ull timeout on dma Michael Nazzareno Trimarchi
2018-10-04 14:36 ` Michael Nazzareno Trimarchi
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