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Sun, 28 Jul 2019 06:21:38 +0000 From: To: , Subject: Re: [PATCH 1/2] mtd: spi-nor: fix GigaDevice quad_enable Thread-Topic: [PATCH 1/2] mtd: spi-nor: fix GigaDevice quad_enable Thread-Index: AQHVQ/Zj/YTQYrM+LkKRVxGsjoLerabfiDQAgAAJQYA= Date: Sun, 28 Jul 2019 06:21:37 +0000 Message-ID: References: <20190726210830.1932-1-roman@advem.lv> <11718527-0145-a99d-83fe-19885c9609f0@microchip.com> In-Reply-To: <11718527-0145-a99d-83fe-19885c9609f0@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR0102CA0014.eurprd01.prod.exchangelabs.com (2603:10a6:802::27) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [86.127.106.210] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f78d49d5-25e9-4173-1f15-08d71323d8a2 x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(2017052603328)(7193020); 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On 07/28/2019 08:48 AM, Tudor.Ambarus@microchip.com wrote: > External E-Mail > > > Hi, Roman, > > On 07/27/2019 12:08 AM, Roman Yeryomin wrote: >> External E-Mail >> >> >> According to datasheets all GD devices are capable of quad mode, which > > Does any of these flashes implement the Basic Flash Parameter Table? Can't we > determine the QE Requirements by parsing BFPT? GD25Q256D can retrieve the QE requirements from BFPT dword 15. No need to set the quad_enable pointer when declaring this flash, it will be overwritten when parsing BFPT. GD25Q256C implements JESD216A - just the first 9 dwords of BFPT, and it can't determine the QE Requirements by parsing the BFPT. That's way we explicitly set the quad_enable function pointer at flash declaration. > >> is enabled via Status Register-2, bit 1 (S9). This corresponds to >> Spansion SR/CR operations. Unfortunately only gd25q256 datasheet is >> clear about Quad Enable Requirements (QER), others have no such >> information in datasheets. >> So define quad_enable for all GD devices to be sure. > > Which flash did you test? What you can do is to check which of these flashes can't determine the QE requirements by parsing BFPT and set the quad_enable just for those who can't. And it would be preferable to do this just for the flashes that you can test. > > Cheers, > ta > >> Also gd25q256 is an exception. There are two versions: C and D. >> First one uses S6 bit (like described in e27072851bf7d) but the latter >> uses S9 bit like others. To add support for D this should be handled >> differently, so, to retain compatibility, leave gd25q256 quad_enable >> callback intact. >> >> Signed-off-by: Roman Yeryomin >> --- >> drivers/mtd/spi-nor/spi-nor.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ > > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/