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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>,
	Boris Brezillon <bbrezillon@kernel.org>,
	linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>,
	linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH v3 1/3] mtd: spi-nor: always use bounce buffer for register read/writes
Date: Thu, 1 Aug 2019 12:15:30 +0530
Message-ID: <d057db47-64a6-01ca-2ccb-d57c532213d4@ti.com> (raw)
In-Reply-To: <20190801074647.792479c1@collabora.com>

Hi Boris

On 01/08/19 11:16 AM, Boris Brezillon wrote:
> On Thu, 1 Aug 2019 10:00:50 +0530
> Vignesh Raghavendra <vigneshr@ti.com> wrote:
> 
>> spi-mem layer expects all buffers passed to it to be DMA'able. But
>> spi-nor layer mostly allocates buffers on stack for reading/writing to
>> registers and therefore are not DMA'able. Introduce bounce buffer to be
>> used to read/write to registers. This ensures that buffer passed to
>> spi-mem layer during register read/writes is DMA'able. With this change
>> nor->cmd-buf is no longer used, so drop it.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---
>> v3: new patch
>>

[...]

>> @@ -2180,11 +2179,13 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
>>  	u8			id[SPI_NOR_MAX_ID_LEN];
>>  	const struct flash_info	*info;
>>  
>> -	tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
>> +	tmp = nor->read_reg(nor, SPINOR_OP_RDID, nor->bouncebuf,
>> +			    SPI_NOR_MAX_ID_LEN);
>>  	if (tmp < 0) {
>>  		dev_err(nor->dev, "error %d reading JEDEC ID\n", tmp);
>>  		return ERR_PTR(tmp);
>>  	}
>> +	memcpy(id, nor->bouncebuf, SPI_NOR_MAX_ID_LEN);
> 
> Why not directly including the change you have in patch 2 (id is a
> pointer that points directly to ->bouncebuf) so you can get rid of this
> memcpy() here?
>

Ok will do that in next version.


>>  
>>  	for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
>>  		info = &spi_nor_ids[tmp];
>> @@ -4121,6 +4122,16 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
>>  	nor->read_proto = SNOR_PROTO_1_1_1;
>>  	nor->write_proto = SNOR_PROTO_1_1_1;
>>  
>> +	/*
>> +	 * We need the bounce buffer early to read/write registers when going
>> +	 * through the spi-mem layer (buffers have to be DMA-able).
> 
> You should probably extend this comment in patch 2 to explain why 4k
> should be enough for regular read/write operations.
> 

Will update

> The patch looks good otherwise.
> 
> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
> 

Thanks for the review!

-- 
Regards
Vignesh

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Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-01  4:30 [PATCH v3 0/3] Merge m25p80 into spi-nor Vignesh Raghavendra
2019-08-01  4:30 ` [PATCH v3 1/3] mtd: spi-nor: always use bounce buffer for register read/writes Vignesh Raghavendra
2019-08-01  5:46   ` Boris Brezillon
2019-08-01  6:45     ` Vignesh Raghavendra [this message]
2019-08-01  4:30 ` [PATCH v3 2/3] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra
2019-08-01  5:52   ` Boris Brezillon
2019-08-01  6:46     ` Vignesh Raghavendra
2019-08-01  4:30 ` [PATCH v3 3/3] mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra

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