From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
<vigneshr@ti.com>, <broonie@kernel.org>,
<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>, <matthias.bgg@gmail.com>,
<michal.simek@xilinx.com>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>
Cc: boris.brezillon@collabora.com, nsekhar@ti.com
Subject: Re: [PATCH v10 08/17] mtd: spi-nor: core: use dummy cycle and address width info from SFDP
Date: Wed, 8 Jul 2020 16:03:47 +0000 [thread overview]
Message-ID: <d4b5178e-debb-1397-caae-f20086f5c3fc@microchip.com> (raw)
In-Reply-To: <20200623183030.26591-9-p.yadav@ti.com>
On 6/23/20 9:30 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The xSPI Profile 1.0 table specifies how many dummy cycles and address
> bytes are needed for the Read Status Register command in octal DTR mode.
> Use that information to send the correct Read SR command.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> ---
> drivers/mtd/spi-nor/core.c | 25 +++++++++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 7d24e63fcca8..f2748f1d9957 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -357,6 +357,8 @@ int spi_nor_write_disable(struct spi_nor *nor)
> static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
> {
> int ret;
> + u8 addr_bytes = nor->params->rdsr_addr_nbytes;
> + u8 dummy = nor->params->rdsr_dummy;
no need to introduce local variables for a single dereference
>
> if (nor->spimem) {
> struct spi_mem_op op =
> @@ -365,10 +367,21 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_IN(1, sr, 1));
>
> + if (spi_nor_protocol_is_dtr(nor->reg_proto)) {
> + op.addr.nbytes = addr_bytes;
> + op.addr.val = 0;
isn't addr already initialized to 0?
> + op.dummy.nbytes = dummy;
> + }
> +
> + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> +
> ret = spi_mem_exec_op(nor->spimem, &op);
> } else {
> - ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,
> - sr, 1);
> + if (spi_nor_protocol_is_dtr(nor->reg_proto))
> + ret = -ENOTSUPP;
> + else
> + ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,
> + sr, 1);
> }
doesn't this belong to a previous patch?
>
> if (ret)
> @@ -388,6 +401,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
> static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
> {
> int ret;
> + u8 addr_bytes = nor->params->rdsr_addr_nbytes;
> + u8 dummy = nor->params->rdsr_dummy;
>
> if (nor->spimem) {
> struct spi_mem_op op =
> @@ -396,6 +411,12 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_IN(1, fsr, 1));
>
> + if (spi_nor_protocol_is_dtr(nor->reg_proto)) {
> + op.addr.nbytes = addr_bytes;
> + op.addr.val = 0;
> + op.dummy.nbytes = dummy;
> + }
> +
> spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>
> ret = spi_mem_exec_op(nor->spimem, &op);
> --
> 2.27.0
>
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next prev parent reply other threads:[~2020-07-08 16:04 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-23 18:30 [PATCH v10 00/17] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 01/17] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-07-08 16:22 ` Tudor.Ambarus
2020-07-13 3:55 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 02/17] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-07-13 6:15 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 03/17] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-07-13 6:19 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 04/17] spi: spi-mtk-nor: " Pratyush Yadav
2020-07-13 6:24 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 05/17] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-07-07 17:37 ` Tudor.Ambarus
2020-07-21 11:29 ` Pratyush Yadav
2020-09-29 15:42 ` Tudor.Ambarus
2020-09-29 16:29 ` Pratyush Yadav
2020-09-29 18:34 ` Tudor.Ambarus
2020-09-29 16:57 ` Vignesh Raghavendra
2020-06-23 18:30 ` [PATCH v10 06/17] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-07-07 17:53 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 07/17] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-07-08 16:01 ` Tudor.Ambarus
2020-07-20 16:38 ` Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 08/17] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-07-08 16:03 ` Tudor.Ambarus [this message]
2020-07-20 16:24 ` Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 09/17] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 10/17] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 11/17] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-07-13 9:33 ` Tudor.Ambarus
2020-06-23 18:30 ` [PATCH v10 12/17] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-07-08 16:08 ` Tudor.Ambarus
2020-07-20 16:21 ` Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 13/17] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-07-08 16:10 ` Tudor.Ambarus
2020-07-20 16:11 ` Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 14/17] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 15/17] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 16/17] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-06-23 18:30 ` [PATCH v10 17/17] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-07-13 6:34 ` [PATCH v10 00/17] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-07-14 19:19 ` Mark Brown
2020-07-15 3:40 ` Tudor.Ambarus
2020-07-14 16:40 ` Mark Brown
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