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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Ashish Kumar <Ashish.Kumar@nxp.com>, <devicetree@vger.kernel.org>
Cc: Kuldeep Singh <kuldeep.singh@nxp.com>,
	broonie@kernel.org, linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, bbrezillon@kernel.org
Subject: Re: [PATCH] drivers: mtd: spi-nor: Add flash property for mt25qu512a and mt35xu02g
Date: Fri, 21 Jun 2019 11:07:47 +0530
Message-ID: <f28085b6-7c0a-1a0c-cc01-c41f35c9ecae@ti.com> (raw)
In-Reply-To: <1560942714-13330-1-git-send-email-Ashish.Kumar@nxp.com>



On 19/06/19 4:41 PM, Ashish Kumar wrote:
> From: Kuldeep Singh <kuldeep.singh@nxp.com>
> 

Please add a suitable commit message. Like, which boards have these
flashes and how was it tested? What modes were tested?

> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>

Need submitter's Sign off as well.

> ---
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 73172d7..34e33a7 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1880,6 +1880,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> +	{ "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES) },

How is this flash/entry different from n25q512a that has same initial
JEDEC ID bytes? Would be good to have that documented in the commit message

>  	{ "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  
>  	/* Micron */
> @@ -1888,6 +1889,7 @@ static const struct flash_info spi_nor_ids[] = {
>  			SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ |
>  			SPI_NOR_4B_OPCODES)
>  	},
> +	{ "mt35xu02g",   INFO(0x2c5b1c, 0, 128 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
>  
>  	/* PMC */
>  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
> 

Also, patch numbering isn't right. Moreover other patches in the series
are independent of this patch. Please resubmit this patch separately
after addressing all the comments.

-- 
Regards
Vignesh

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Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-19 11:11 Ashish Kumar
2019-06-19 11:11 ` [Patch v3 1/2] dt-bindings: spi: spi-fsl-qspi: Add ls2080a compatibility string to bindings Ashish Kumar
2019-07-09 20:08   ` Rob Herring
2019-07-29  9:11     ` [EXT] " Ashish Kumar
2019-07-31 23:26       ` Leo Li
2019-08-01  7:09         ` Ashish Kumar
2019-08-01 15:22     ` Han Xu
2019-08-05  9:08       ` [EXT] " Ashish Kumar
2019-08-05 11:13         ` Mark Brown
2019-06-19 11:11 ` [Patch v3 2/2] dt-bindings: spi: spi-fsl-qspi: Add bindings of ls1088a and ls1012a Ashish Kumar
2019-07-09 20:08   ` Rob Herring
2019-07-29  9:08     ` [EXT] " Ashish Kumar
2019-07-31 23:28       ` Leo Li
2019-08-01  7:09         ` Ashish Kumar
2019-08-01 15:24     ` Han Xu
2019-08-05  9:07       ` [EXT] " Ashish Kumar
2019-08-05 11:13         ` Mark Brown
2019-06-21  5:37 ` Vignesh Raghavendra [this message]

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