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Mon, 11 Nov 2019 19:26:14 +0000 From: To: , Subject: Re: [PATCH v5 0/6] mtd: spi-nor: Quad Enable and (un)lock methods Thread-Topic: [PATCH v5 0/6] mtd: spi-nor: Quad Enable and (un)lock methods Thread-Index: AQHVlUcxNfurCR7UA0az+I+u2JP03qeGYSqA Date: Mon, 11 Nov 2019 19:26:14 +0000 Message-ID: References: <20191107084135.22122-1-tudor.ambarus@microchip.com> In-Reply-To: <20191107084135.22122-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR09CA0147.eurprd09.prod.outlook.com (2603:10a6:803:12c::31) To MN2PR11MB4448.namprd11.prod.outlook.com (2603:10b6:208:193::29) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [5.12.60.46] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a4bfaba0-d365-4792-30e5-08d766dd0411 x-ms-traffictypediagnostic: MN2PR11MB4352: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 0218A015FA x-forefront-antispam-report: SFV:NSPM; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On 11/07/2019 10:41 AM, Tudor.Ambarus@microchip.com wrote: > From: Tudor Ambarus > > Tested on w25q128jvq. > > Fixed the clearing of QE bit on (un)lock() operations. Reworked the > Quad Enable methods and the disabling of the block write protection > at power-up. > > v5: > - Rename all Quad Enable methods in one patch > - Extend the Read Back test to both SR1 and SR2 in one patch > - Reorder patches, so that the fixes come one after another > - Collect R-b tags. > > v4: > - Use dev_dbg insted of dev_err for low level info > - replace "&nor->bouncebuf[0]" with "nor->bouncebuf" and "&sr_cr[0]" with > "sr_cr". Update across all patches. > > v3: split patches, update retlen handling in sst_write. > > v2: > - Introduce spi_nor_write_16bit_cr_and_check() as per Vignesh's suggestion. The > Configuration Register contains bits that can be updated in future: FREEZE, > CMP. Provide a generic method that allows updating all bits of the > Configuration Register. > - Fix SNOR_F_NO_READ_CR case in > "mtd: spi-nor: Rework the disabling of block write protection". When the flash > doesn't support the CR Read command, we make an assumption about the value of > the QE bit. In spi_nor_init(), call spi_nor_quad_enable() first, then > spi_nor_unlock_all(), so that at the spi_nor_unlock_all() time we can be sure > the QE bit has value one, because of the previous call to spi_nor_quad_enable(). > - Fix if statement in spi_nor_write_sr_and_check(): > if (nor->flags & SNOR_F_HAS_16BIT_SR) > - Fix documentation warnings. > - New patch: "mtd: spi-nor: Check all the bits written, not just the BP ones". > - Drop Global Unlock patches, will send them in a different patch set. > > The patch set can be tested using mtd-utils: > 1/ do a read-erase-write-read-back test immediately after boot, to check > the spi_nor_unlock_all() method. The focus is on the erase/write > methods, we want to see if the flash is unlocked at power-up. > mtd_debug read /dev/mtd-yours offset size read-file > hexdump read-file > mtd_debug erase /dev/mtd-yours offset size > dd if=/dev/urandom of=write-file bs=please-choose count=please-choose > mtd_debug write /dev/mtd-yours offset write-file-size write-file > mtd_debug read /dev/mtd-yours offset write-file-size read-file > sha1sum read-file write-file > 2/ lock flash then try to erase/write it, to see if the lock works > flash_lock /dev/mtd-yours offset block-count > Do the read-erase-write-read-back test from 1/. The contents of > flash should not change in the erase and write steps. > 3/ unlock flash and do the read-erase-write-read-back from 1/. The value of the > QEE should not change and you should be able to erase and write the flash. > Test 1/ should be successful. > > Tudor Ambarus (6): > mtd: spi-nor: Fix clearing of QE bit on lock()/unlock() > mtd: spi-nor: Rework the disabling of block write protection > mtd: spi-nor: Extend the SR Read Back test > mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1 > mtd: spi-nor: Merge spansion Quad Enable methods > mtd: spi-nor: Rename Quad Enable methods > > drivers/mtd/spi-nor/spi-nor.c | 438 ++++++++++++++++++++++++------------------ > include/linux/mtd/spi-nor.h | 12 +- > 2 files changed, 254 insertions(+), 196 deletions(-) > Amend commit description for patch 2/6, s/the the/the. All applied to spi-nor/next. ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/