From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au,
linux-nvdimm@lists.01.org, dan.j.williams@intel.com
Cc: Jan Kara <jack@suse.cz>,
msuchanek@suse.de,
"Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
Subject: [PATCH v6 7/8] powerpc/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions.
Date: Mon, 29 Jun 2020 19:27:21 +0530 [thread overview]
Message-ID: <20200629135722.73558-8-aneesh.kumar@linux.ibm.com> (raw)
In-Reply-To: <20200629135722.73558-1-aneesh.kumar@linux.ibm.com>
We only support persistent memory on P8 and above. This is enforced by the
firmware and further checked on virtualzied platform during platform init.
Add WARN_ONCE in pmem flush routines to catch the wrong usage of these.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/include/asm/cacheflush.h | 2 ++
arch/powerpc/lib/pmem.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 95782f77d768..1ab0fa660497 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -103,6 +103,8 @@ static inline void arch_pmem_flush_barrier(void)
{
if (cpu_has_feature(CPU_FTR_ARCH_207S))
asm volatile(PPC_PHWSYNC ::: "memory");
+ else
+ WARN_ONCE(1, "Using pmem flush on older hardware.");
}
#include <asm-generic/cacheflush.h>
diff --git a/arch/powerpc/lib/pmem.c b/arch/powerpc/lib/pmem.c
index 21210fa676e5..f40bd908d28d 100644
--- a/arch/powerpc/lib/pmem.c
+++ b/arch/powerpc/lib/pmem.c
@@ -37,12 +37,14 @@ static inline void clean_pmem_range(unsigned long start, unsigned long stop)
{
if (cpu_has_feature(CPU_FTR_ARCH_207S))
return __clean_pmem_range(start, stop);
+ WARN_ONCE(1, "Using pmem flush on older hardware.");
}
static inline void flush_pmem_range(unsigned long start, unsigned long stop)
{
if (cpu_has_feature(CPU_FTR_ARCH_207S))
return __flush_pmem_range(start, stop);
+ WARN_ONCE(1, "Using pmem flush on older hardware.");
}
/*
--
2.26.2
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next prev parent reply other threads:[~2020-06-29 13:58 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 13:57 [PATCH v6 0/8] Support new pmem flush and sync instructions for POWER Aneesh Kumar K.V
2020-06-29 13:57 ` [PATCH v6 1/8] powerpc/pmem: Restrict papr_scm to P8 and above Aneesh Kumar K.V
2020-06-29 13:57 ` [PATCH v6 2/8] powerpc/pmem: Add new instructions for persistent storage and sync Aneesh Kumar K.V
2020-06-29 13:57 ` [PATCH v6 3/8] powerpc/pmem: Add flush routines using new pmem store and sync instruction Aneesh Kumar K.V
2020-06-29 13:57 ` [PATCH v6 4/8] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier Aneesh Kumar K.V
2020-06-29 18:53 ` kernel test robot
2020-06-29 20:27 ` Aneesh Kumar K.V
2020-06-29 19:27 ` kernel test robot
2020-06-29 20:29 ` [PATCH updated] " Aneesh Kumar K.V
2020-06-30 1:32 ` Dan Williams
2020-06-30 5:01 ` Aneesh Kumar K.V
2020-06-30 7:06 ` Dan Williams
2020-06-30 7:22 ` Aneesh Kumar K.V
2020-06-30 7:53 ` Aneesh Kumar K.V
2020-06-30 12:48 ` Aneesh Kumar K.V
2020-06-30 19:21 ` Dan Williams
2020-06-29 13:57 ` [PATCH v6 5/8] powerpc/pmem/of_pmem: Update of_pmem to use the new barrier instruction Aneesh Kumar K.V
2020-06-30 1:38 ` Dan Williams
2020-06-30 5:05 ` Aneesh Kumar K.V
2020-06-30 7:16 ` Dan Williams
2020-06-29 13:57 ` [PATCH v6 6/8] powerpc/pmem: Avoid the barrier in flush routines Aneesh Kumar K.V
2020-06-29 16:09 ` Michal Suchánek
2020-06-29 20:40 ` Aneesh Kumar K.V
2020-06-30 1:50 ` Dan Williams
2020-06-30 8:54 ` Michal Suchánek
2020-06-30 9:20 ` Aneesh Kumar K.V
2020-06-30 19:45 ` Dan Williams
2020-07-01 3:09 ` Aneesh Kumar K.V
2020-07-01 5:08 ` Dan Williams
2020-06-29 13:57 ` Aneesh Kumar K.V [this message]
2020-06-30 1:52 ` [PATCH v6 7/8] powerpc/pmem: Add WARN_ONCE to catch the wrong usage of pmem flush functions Dan Williams
2020-06-30 5:05 ` Aneesh Kumar K.V
2020-06-29 13:57 ` [PATCH v6 8/8] powerpc/pmem: Initialize pmem device on newer hardware Aneesh Kumar K.V
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