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Tue, 4 May 2021 04:59:12 +0000 (GMT) Subject: Re: [PATCH v4 0/3] nvdimm: Enable sync-dax property for nvdimm To: Dan Williams , Shivaprasad G Bhat References: <161966810162.652.13723419108625443430.stgit@17be908f7c1c> From: "Aneesh Kumar K.V" Message-ID: Date: Tue, 4 May 2021 10:29:11 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BNnxxzZrrD-sq9EhyaMEh4Q4j-zG-p0v X-Proofpoint-ORIG-GUID: 002b9ZvWVgbyy83xiE_uyAvrr1UxNmU5 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-05-04_01:2021-05-03,2021-05-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 adultscore=0 suspectscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 mlxlogscore=999 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2105040033 Message-ID-Hash: VT2ZYJEYEK6SOYCG3BGFY2LG4VCCUN4O X-Message-ID-Hash: VT2ZYJEYEK6SOYCG3BGFY2LG4VCCUN4O X-MailFrom: aneesh.kumar@linux.ibm.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: David Gibson , Greg Kurz , qemu-ppc@nongnu.org, Eduardo Habkost , marcel.apfelbaum@gmail.com, "Michael S. Tsirkin" , Igor Mammedov , Xiao Guangrong , Peter Maydell , Eric Blake , qemu-arm@nongnu.org, richard.henderson@linaro.org, Paolo Bonzini , Stefan Hajnoczi , Haozhong Zhang , shameerali.kolothum.thodi@huawei.com, kwangwoo.lee@sk.com, Markus Armbruster , Qemu Developers , linux-nvdimm , kvm-ppc@vger.kernel.org, shivaprasadbhat@gmail.com, bharata@linux.vnet.ibm.com X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: Content-Type: text/plain; charset="us-ascii"; format="flowed" Content-Transfer-Encoding: 7bit On 5/4/21 1:11 AM, Dan Williams wrote: > On Mon, May 3, 2021 at 7:06 AM Shivaprasad G Bhat wrote: >> ..... > > The proposal that "sync-dax=unsafe" for non-PPC architectures, is a > fundamental misrepresentation of how this is supposed to work. Rather > than make "sync-dax" a first class citizen of the device-description > interface I'm proposing that you make this a separate device-type. > This also solves the problem that "sync-dax" with an implicit > architecture backend assumption is not precise, but a new "non-nvdimm" > device type would make it explicit what the host is advertising to the > guest. > Currently, users can use a virtualized nvdimm support in Qemu to share host page cache to the guest via the below command -object memory-backend-file,id=memnvdimm1,mem-path=file_name_in_host_fs -device nvdimm,memdev=memnvdimm1 Such usage can results in wrong application behavior because there is no hint to the application/guest OS that a cpu cache flush is not sufficient to ensure persistence. I understand that virio-pmem is suggested as an alternative for that. But why not fix virtualized nvdimm if platforms can express the details. ie, can ACPI indicate to the guest OS that the device need a flush mechanism to ensure persistence in the above case? What this patch series did was to express that property via a device tree node and guest driver enables a hypercall based flush mechanism to ensure persistence. .... >> >> On PPC, the default is "sync-dax=writeback" - so the ND_REGION_ASYNC >> >> is set for the region and the guest makes hcalls to issue fsync on the host. >> >> >> Are you suggesting me to keep it "unsafe" as default for all architectures >> >> including PPC and a user can set it to "writeback" if desired. > > No, I am suggesting that "sync-dax" is insufficient to convey this > property. This behavior warrants its own device type, not an ambiguous > property of the memory-backend-file with implicit architecture > assumptions attached. > Why is it insufficient? Is it because other architectures don't have an ability express this detail to guest OS? Isn't that an arch limitations? -aneesh _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org