From: "Sven Peter" <sven@svenpeter.dev>
To: "Arnd Bergmann" <arnd@arndb.de>, "Christoph Hellwig" <hch@infradead.org>
Cc: linux-nvme@lists.infradead.org
Subject: Re: [asahilinux:nvme/dev 13/17] drivers/nvme/host/pci.c:2249:2-3: Unneeded semicolon
Date: Mon, 09 Aug 2021 22:11:19 +0200 [thread overview]
Message-ID: <05dfa9d8-7cee-4431-abe3-4cc583985773@www.fastmail.com> (raw)
In-Reply-To: <CAK8P3a1bDeJ56uk74qWxPjyuZwaDf-0mCsH3D5bP+yXWLKLGtA@mail.gmail.com>
On Mon, Aug 9, 2021, at 17:53, Arnd Bergmann wrote:
> On Mon, Aug 9, 2021 at 4:29 PM Christoph Hellwig <hch@infradead.org> wrote:
> > Also can one of you look how PRPs are actually used by MacOS? Given
> > that this device always seems to be behind a IOMMU creating one entry
> > per page seems rather weird given that the apple_nvmmu_tcb structure
> > already contains the full length. Maybe it actually ignores all but
> > the first PRP?
>
> I'll leave this up to Sven to answer. He also wrote the iommu driver,
> so he probably has a good idea of what is going on here already.
>
> Arnd
>
Not yet, but figuring out how this NVMe-IOMMU works in detail was
already on my TODO list :-)
Some background - the M1 has at least four different IOMMU-like
HW blocks:
DART (for which I wrote a driver and where I'd actually know what's going
on in detail), SART (simple DMA address filter required by the NVMe
co-processor for non-nvme transactions), this weird NVMe IOMMU (that
also seems to be somehow related to disk encryption) and GART for their GPU.
Sven
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next prev parent reply other threads:[~2021-08-09 20:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <202108051646.vdMMUBea-lkp@intel.com>
[not found] ` <YQ7GVu1TqpqbHZOb@infradead.org>
2021-08-09 10:02 ` [asahilinux:nvme/dev 13/17] drivers/nvme/host/pci.c:2249:2-3: Unneeded semicolon Arnd Bergmann
2021-08-09 14:29 ` Christoph Hellwig
2021-08-09 15:53 ` Arnd Bergmann
2021-08-09 20:11 ` Sven Peter [this message]
2021-08-18 6:26 ` Sven Peter
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