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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=YaJJ4Ep4RplK89MbLnaosbbpArL7R3G2Cn/bHfBbabU=; b=UW0172aOYWoM7FbPbvgcCtviVgftZ6l9FtAUlQwzv/E7yv+F1usAmW2yrpJQIA+kx2 MliTi+4gGershAy0mCriAFUjPCpTK5Hm9cuKdeThYQGDwIOvCbn3FciRxyAADXo8L0dJ iAuQSOFFnkUrkM1E3knTgE8h35Br6vzIvAlTz1CB2YVeSTOZtgagMZdV97OwBUcHRrgT FZvCqqkH2qIUUJzGoOsRNPT3I8RyUMnLUxvEClTdQMfBiT4eY+LznYEht3pS75gQnMmQ w9UKpzoOKlib0kcRiI7oRo6+qdGm3P7vRWd+2ZQ6NlyuFHJeumFXxaIWD8+ksXuHqpeO 3Agw== X-Gm-Message-State: APjAAAUsPESWwNHciBtNO3IThXQRROCFqunD8t/VgPPYLsIFWrdBl39e 9soRrhD+T7WETVgJqnxTlGbFVql2oThDxdHGKYZm/w== X-Google-Smtp-Source: APXvYqw/u26SbY8DkyElzKzUHiinl8GM/LRdzCnjTHdmnWDDPvE6lzypd3+RL1UuTwZyvXsJo4Xbs6ryvgDCqDRqyzU= X-Received: by 2002:a5d:6a81:: with SMTP id s1mr23578780wru.246.1570454422537; Mon, 07 Oct 2019 06:20:22 -0700 (PDT) MIME-Version: 1.0 References: <20191007114253.30735-1-ard.biesheuvel@linaro.org> <20191007120721.GA21060@lst.de> <20191007122738.GA24804@lst.de> <20191007124843.GA53339@C02WT3WMHTD6> In-Reply-To: <20191007124843.GA53339@C02WT3WMHTD6> From: Ard Biesheuvel Date: Mon, 7 Oct 2019 15:20:11 +0200 Message-ID: Subject: Re: [PATCH v3] nvme: retain split access workaround for capability reads To: Keith Busch X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191007_062024_522810_FB0A51FA X-CRM114-Status: GOOD ( 25.51 ) X-BeenThere: linux-nvme@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: axboe@fb.com, Ilias Apalodimas , Christoph Hellwig , linux-nvme@lists.infradead.org, sagi@grimberg.me Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-nvme" Errors-To: linux-nvme-bounces+linux-nvme=archiver.kernel.org@lists.infradead.org On Mon, 7 Oct 2019 at 14:48, Keith Busch wrote: > > On Mon, Oct 07, 2019 at 02:32:43PM +0200, Ard Biesheuvel wrote: > > On Mon, 7 Oct 2019 at 14:27, Christoph Hellwig wrote: > > > > > > On Mon, Oct 07, 2019 at 02:24:58PM +0200, Ard Biesheuvel wrote: > > > > > If you interconnect doesn't support 8-byte MMIO read/write TLPs you > > > > > have a much deeper problem, as this will break all drivers using > > > > > readq/writeq. And we currently only have compile time detection for > > > > > readq/writeq, not runtime so you'll have to invent a scheme if this > > > > > works at all or not. > > > > > > > > Sure. But the practical reality is that the hardware in question > > > > (including the Apple controller) worked perfectly fine until commit > > > > 7fd8930f26be4 introduced a readq() call into a file that had > > > > deliberately been switched to using lo_hi_readq() because readq() > > > > doesn't work reliably for all hardware we would like it to support. > > > > Theorizing about *why* readq() doesn't work reliably in which > > > > particular case doesn't seem that useful to me, given how trivial the > > > > fix is. > > > > > > My point here is that if it isn't the PCIe device that is broken like > > > in the apple case, but your interconnect you have a problem that can't > > > be fixed just in the nvme driver. We have tons of other drivers relying > > > in readq/writeq working if it is available. You'll need to find a more > > > general workaround, independent of the fact that we have a few NVMe > > > controllers that always need this workaround. And at least for NVMe > > > the spec specically allows split 32-bit access at least. > > > > OK, that is good to know. Mind you, I used 'interconnect' in the > > abstract sense, meaning whatever sits between the CPU doing the read > > and the 64-bit register in the BAR space. > > > > But I fail to see your point. Why is it relevant for deciding whether > > to apply a NVMe fix if the affected hardware can or cannot use other > > types of PCIe devices? Note that I am not proposing some hacky > > workaround to be applied, but just to stick with the workaround that > > was already accepted (and I'm pretty sure that this Apple hardware got > > broken too with commit 7fd8930f26be4) > > The point is the reasoning in the changelog does not justify *this* patch. If > you change the wording to not mention your host controller, and instead just > refer to the previous NVMe behavior (and modify your comment accordingly), then > we should be fine. > > If you explain this patch by saying it's to fix a host controller, then the > patch is no longer sufficient on it's own and should be fixed elsewhere, > perhaps by providing a special pci_ops structure for your controller. Fair enough. Any suggestions for the wording of the comment? _______________________________________________ Linux-nvme mailing list Linux-nvme@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-nvme