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From: Ard Biesheuvel <>
To: Christoph Hellwig <>
Cc:, Keith Busch <>,
	Ilias Apalodimas <>,,
Subject: Re: [PATCH v3] nvme: retain split access workaround for capability reads
Date: Mon, 7 Oct 2019 14:24:58 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On Mon, 7 Oct 2019 at 14:07, Christoph Hellwig <> wrote:
> On Mon, Oct 07, 2019 at 01:42:53PM +0200, Ard Biesheuvel wrote:
> > This fixes a boot issue on some ARM boxes with NVMe behind a Synopsys
> > DesignWare PCIe host controller.
> >  static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val)
> >  {
> > -     *val = readq(to_nvme_dev(ctrl)->bar + off);
> > +     /* use a split read to work around buggy interconnects */
> > +     *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off);
> I though this was to fix back up the broken Apple controllers?

Yes, and other hardware suffering from the same issue.

> If you interconnect doesn't support 8-byte MMIO read/write TLPs you
> have a much deeper problem, as this will break all drivers using
> readq/writeq.  And we currently only have compile time detection for
> readq/writeq, not runtime so you'll have to invent a scheme if this
> works at all or not.

Sure. But the practical reality is that the hardware in question
(including the Apple controller) worked perfectly fine until commit
7fd8930f26be4 introduced a readq() call into a file that had
deliberately been switched to using lo_hi_readq() because readq()
doesn't work reliably for all hardware we would like it to support.
Theorizing about *why* readq() doesn't work reliably in which
particular case doesn't seem that useful to me, given how trivial the
fix is.

Linux-nvme mailing list

  reply	other threads:[~2019-10-07 12:25 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-07 11:42 [PATCH v3] nvme: retain split access workaround for capability reads Ard Biesheuvel
2019-10-07 12:07 ` Christoph Hellwig
2019-10-07 12:24   ` Ard Biesheuvel [this message]
2019-10-07 12:27     ` Christoph Hellwig
2019-10-07 12:32       ` Ard Biesheuvel
2019-10-07 12:47         ` Christoph Hellwig
2019-10-07 12:48         ` Keith Busch
2019-10-07 13:20           ` Ard Biesheuvel
2019-10-07 13:32             ` Keith Busch
2019-10-07 13:33               ` Ard Biesheuvel

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