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* [PATCH] ARM: dts: omap5: Add bus_dma_limit for L3 bus
@ 2020-03-16 10:27 Roger Quadros
  2020-03-17 17:01 ` Tony Lindgren
  0 siblings, 1 reply; 2+ messages in thread
From: Roger Quadros @ 2020-03-16 10:27 UTC (permalink / raw)
  To: tony
  Cc: hch, robin.murphy, robh+dt, nm, t-kristo, nsekhar, linux-omap,
	devicetree, linux-kernel, Roger Quadros, stable

The L3 interconnect's memory map is from 0x0 to
0xffffffff. Out of this, System memory (SDRAM) can be
accessed from 0x80000000 to 0xffffffff (2GB)

OMAP5 does support 4GB of SDRAM but upper 2GB can only be
accessed by the MPU subsystem.

Add the dma-ranges property to reflect the physical address limit
of the L3 bus.

Cc: stable@kernel.org
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index d0ecf54d5a23..a7562d3deb1a 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -143,6 +143,7 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0 0 0 0xc0000000>;
+		dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 		reg = <0 0x44000000 0 0x2000>,
 		      <0 0x44800000 0 0x3000>,
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] ARM: dts: omap5: Add bus_dma_limit for L3 bus
  2020-03-16 10:27 [PATCH] ARM: dts: omap5: Add bus_dma_limit for L3 bus Roger Quadros
@ 2020-03-17 17:01 ` Tony Lindgren
  0 siblings, 0 replies; 2+ messages in thread
From: Tony Lindgren @ 2020-03-17 17:01 UTC (permalink / raw)
  To: Roger Quadros
  Cc: hch, robin.murphy, robh+dt, nm, t-kristo, nsekhar, linux-omap,
	devicetree, linux-kernel, stable

* Roger Quadros <rogerq@ti.com> [200316 03:28]:
> The L3 interconnect's memory map is from 0x0 to
> 0xffffffff. Out of this, System memory (SDRAM) can be
> accessed from 0x80000000 to 0xffffffff (2GB)
> 
> OMAP5 does support 4GB of SDRAM but upper 2GB can only be
> accessed by the MPU subsystem.
> 
> Add the dma-ranges property to reflect the physical address limit
> of the L3 bus.

Thanks applying into fixes.

Tony

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2020-03-16 10:27 [PATCH] ARM: dts: omap5: Add bus_dma_limit for L3 bus Roger Quadros
2020-03-17 17:01 ` Tony Lindgren

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