[PATCH 0/8] ARM: omap4/5: crypto support fixes

[PATCH 0/8] ARM: omap4/5: crypto support fixes

[Tero Kristo]

Hi,

This series fixes a couple of crypto data bugs for omap4/5. It also adds
support for crypto accelerators for omap5; the data for these is just
basically copied over from omap4.

OMAP5 currently appears to be running out of available DMA channels,
SPI/MMC are allocating a huge number of channels permanently in boot and
there are only 32 of them available in total. To mitigate the issue
partly, I have left the DES node disabled by default to save two
channels, if someone needs DES support, it can be easily enabled.
However, it might be useful to actually disable some of the SPI/MMC
nodes to save on the number of channels and to avoid running into any
problems.

-Tero


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[PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tero Kristo]

The node name for these should be clk instead of clock. Otherwise the
clock driver won't be able to map the parent/child relationships
properly, and large number of clocks end up in orphaned state.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap44xx-clocks.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi b/arch/arm/boot/dts/omap44xx-clocks.dtsi
index 532868591107..b82b1ca0e557 100644
--- a/arch/arm/boot/dts/omap44xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
@@ -1279,13 +1279,13 @@
 		#size-cells = <1>;
 		ranges = <0 0x1400 0x200>;
 
-		l4_per_clkctrl: clock@20 {
+		l4_per_clkctrl: clk@20 {
 			compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
 			reg = <0x20 0x144>;
 			#clock-cells = <2>;
 		};
 
-		l4_secure_clkctrl: clock@1a0 {
+		l4_secure_clkctrl: clk@1a0 {
 			compatible = "ti,clkctrl-l4-secure", "ti,clkctrl";
 			reg = <0x1a0 0x3c>;
 			#clock-cells = <2>;
-- 
2.17.1

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[PATCH 2/8] ARM: dts: omap5: fix node names for the l4_cm clkctrl nodes

[Tero Kristo]

The node name for these should be clk instead of clock. Otherwise the
clock driver won't be able to map the parent/child relationships
properly, and large number of clocks end up in orphaned state.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap54xx-clocks.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 42f2c447727d..746048813a12 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -1125,13 +1125,13 @@
 		#size-cells = <1>;
 		ranges = <0 0x1000 0x200>;
 
-		l4per_clkctrl: clock@20 {
+		l4per_clkctrl: clk@20 {
 			compatible = "ti,clkctrl-l4per", "ti,clkctrl";
 			reg = <0x20 0x15c>;
 			#clock-cells = <2>;
 		};
 
-		l4sec_clkctrl: clock@1a0 {
+		l4sec_clkctrl: clk@1a0 {
 			compatible = "ti,clkctrl-l4sec", "ti,clkctrl";
 			reg = <0x1a0 0x3c>;
 			#clock-cells = <2>;
-- 
2.17.1

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[PATCH 3/8] ARM: dts: omap5: add aes1 entry

[Tero Kristo]

OMAP5 has AES hardware cryptographic accelerator, add AES1 instance for
it.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 2ac7f021c284..30391dbc7f8f 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -247,6 +247,35 @@
 			hw-caps-temp-alert;
 		};
 
+		aes1_target: target-module@4b501000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
+			reg = <0x4b501080 0x4>,
+			      <0x4b501084 0x4>,
+			      <0x4b501088 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			ti,syss-mask = <1>;
+			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+			clocks = <&l4sec_clkctrl OMAP5_AES1_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x4b501000 0x1000>;
+
+			aes1: aes@0 {
+				compatible = "ti,omap4-aes";
+				reg = <0 0xa0>;
+				interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&sdma 111>, <&sdma 110>;
+				dma-names = "tx", "rx";
+			};
+		};
+
 		bandgap: bandgap@4a0021e0 {
 			reg = <0x4a0021e0 0xc
 			       0x4a00232c 0xc
-- 
2.17.1

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[PATCH 4/8] ARM: dts: omap5: add aes2 entry

[Tero Kristo]

OMAP5 has AES hardware cryptographic accelerator, add AES2 instance for
it.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 30391dbc7f8f..007911685cd9 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -276,6 +276,35 @@
 			};
 		};
 
+		aes2_target: target-module@4b701000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
+			reg = <0x4b701080 0x4>,
+			      <0x4b701084 0x4>,
+			      <0x4b701088 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			ti,syss-mask = <1>;
+			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+			clocks = <&l4sec_clkctrl OMAP5_AES2_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x4b701000 0x1000>;
+
+			aes2: aes@0 {
+				compatible = "ti,omap4-aes";
+				reg = <0 0xa0>;
+				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&sdma 114>, <&sdma 113>;
+				dma-names = "tx", "rx";
+			};
+		};
+
 		bandgap: bandgap@4a0021e0 {
 			reg = <0x4a0021e0 0xc
 			       0x4a00232c 0xc
-- 
2.17.1

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[PATCH 5/8] ARM: dts: omap5: add SHA crypto accelerator node

[Tero Kristo]

Add the single available SHA crypto accelerator device for OMAP5 SoC.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap5.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 007911685cd9..5e74f441c7e5 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -305,6 +305,34 @@
 			};
 		};
 
+		sham_target: target-module@4b100000 {
+			compatible = "ti,sysc-omap3-sham", "ti,sysc";
+			reg = <0x4b100100 0x4>,
+			      <0x4b100110 0x4>,
+			      <0x4b100114 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,syss-mask = <1>;
+			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+			clocks = <&l4sec_clkctrl OMAP5_SHA2MD5_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x4b100000 0x1000>;
+
+			sham: sham@0 {
+				compatible = "ti,omap4-sham";
+				reg = <0 0x300>;
+				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&sdma 119>;
+				dma-names = "rx";
+			};
+		};
+
 		bandgap: bandgap@4a0021e0 {
 			reg = <0x4a0021e0 0xc
 			       0x4a00232c 0xc
-- 
2.17.1

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[PATCH 6/8] ARM: dts: omap5: add DES crypto accelerator node

[Tero Kristo]

OMAP5 contains a single DES crypto accelerator instance. Add node for
this in DT to enable it.

We keep the node disabled for now, as it appears OMAP5 platform is
running out of available DMA channels, and DES is the least interesting
crypto accelerator available on the device.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/boot/dts/omap5-l4.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
index f68740abb8aa..55999655a3bc 100644
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -1003,6 +1003,7 @@
 			 <0x00090000 0x00090000 0x002000>,	/* ap 55 */
 			 <0x00092000 0x00092000 0x001000>,	/* ap 56 */
 			 <0x000a4000 0x000a4000 0x001000>,	/* ap 57 */
+			 <0x000a5000 0x000a5000 0x001000>,
 			 <0x000a6000 0x000a6000 0x001000>,	/* ap 58 */
 			 <0x000a8000 0x000a8000 0x004000>,	/* ap 59 */
 			 <0x000ac000 0x000ac000 0x001000>,	/* ap 60 */
@@ -1908,6 +1909,36 @@
 				 <0x00001000 0x000a5000 0x00001000>;
 		};
 
+		des_target: target-module@a5000 {	/* 0x480a5000 */
+			compatible = "ti,sysc-omap2", "ti,sysc";
+			reg = <0xa5030 0x4>,
+			      <0xa5034 0x4>,
+			      <0xa5038 0x4>;
+			reg-names = "rev", "sysc", "syss";
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+					 SYSC_OMAP2_AUTOIDLE)>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			ti,syss-mask = <1>;
+			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+			clocks = <&l4sec_clkctrl OMAP5_DES3DES_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0xa5000 0x00001000>;
+			status = "disabled";
+
+			des: des@0 {
+				compatible = "ti,omap4-des";
+				reg = <0 0xa0>;
+				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&sdma 117>, <&sdma 116>;
+				dma-names = "tx", "rx";
+			};
+		};
+
 		target-module@a8000 {			/* 0x480a8000, ap 59 2a.0 */
 			compatible = "ti,sysc";
 			status = "disabled";
-- 
2.17.1

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[PATCH 7/8] ARM: OMAP4: Make L4SEC clock domain SWSUP only

[Tero Kristo]

Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP4, so do the same change
for OMAP4 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 6005c4ed3bc6..8285be7c1eab 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -214,7 +214,7 @@ static struct clockdomain l4_secure_44xx_clkdm = {
 	.dep_bit	  = OMAP4430_L4SEC_STATDEP_SHIFT,
 	.wkdep_srcs	  = l4_secure_wkup_sleep_deps,
 	.sleepdep_srcs	  = l4_secure_wkup_sleep_deps,
-	.flags		  = CLKDM_CAN_HWSUP_SWSUP,
+	.flags		  = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain l4_per_44xx_clkdm = {
-- 
2.17.1

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[PATCH 8/8] ARM: OMAP5: Make L4SEC clock domain SWSUP only

[Tero Kristo]

Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP5, so do the same change
for OMAP5 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/clockdomains54xx_data.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/clockdomains54xx_data.c b/arch/arm/mach-omap2/clockdomains54xx_data.c
index 3ab41fc89dd3..5611e08018a2 100644
--- a/arch/arm/mach-omap2/clockdomains54xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains54xx_data.c
@@ -170,7 +170,7 @@ static struct clockdomain l4sec_54xx_clkdm = {
 	.dep_bit	  = OMAP54XX_L4SEC_STATDEP_SHIFT,
 	.wkdep_srcs	  = l4sec_wkup_sleep_deps,
 	.sleepdep_srcs	  = l4sec_wkup_sleep_deps,
-	.flags		  = CLKDM_CAN_HWSUP_SWSUP,
+	.flags		  = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain iva_54xx_clkdm = {
-- 
2.17.1

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Re: [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tony Lindgren]

* Tero Kristo <t-kristo@ti.com> [200429 14:31]:
> The node name for these should be clk instead of clock. Otherwise the
> clock driver won't be able to map the parent/child relationships
> properly, and large number of clocks end up in orphaned state.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  arch/arm/boot/dts/omap44xx-clocks.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi b/arch/arm/boot/dts/omap44xx-clocks.dtsi
> index 532868591107..b82b1ca0e557 100644
> --- a/arch/arm/boot/dts/omap44xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
> @@ -1279,13 +1279,13 @@
>  		#size-cells = <1>;
>  		ranges = <0 0x1400 0x200>;
>  
> -		l4_per_clkctrl: clock@20 {
> +		l4_per_clkctrl: clk@20 {
>  			compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
>  			reg = <0x20 0x144>;
>  			#clock-cells = <2>;
>  		};
>  
> -		l4_secure_clkctrl: clock@1a0 {
> +		l4_secure_clkctrl: clk@1a0 {
>  			compatible = "ti,clkctrl-l4-secure", "ti,clkctrl";
>  			reg = <0x1a0 0x3c>;
>  			#clock-cells = <2>;

Heh this is no longer needed since commit 6c3090520554
("clk: ti: clkctrl: Fix hidden dependency to node name")
that added support for using the compatible name :)

Maybe you are using some older tree? Or else there's
still something wrong somewhere.

Regards,

Tony

Re: [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tero Kristo]

On 30/04/2020 01:07, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [200429 14:31]:
>> The node name for these should be clk instead of clock. Otherwise the
>> clock driver won't be able to map the parent/child relationships
>> properly, and large number of clocks end up in orphaned state.
>>
>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>> ---
>>   arch/arm/boot/dts/omap44xx-clocks.dtsi | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi b/arch/arm/boot/dts/omap44xx-clocks.dtsi
>> index 532868591107..b82b1ca0e557 100644
>> --- a/arch/arm/boot/dts/omap44xx-clocks.dtsi
>> +++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
>> @@ -1279,13 +1279,13 @@
>>   		#size-cells = <1>;
>>   		ranges = <0 0x1400 0x200>;
>>   
>> -		l4_per_clkctrl: clock@20 {
>> +		l4_per_clkctrl: clk@20 {
>>   			compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
>>   			reg = <0x20 0x144>;
>>   			#clock-cells = <2>;
>>   		};
>>   
>> -		l4_secure_clkctrl: clock@1a0 {
>> +		l4_secure_clkctrl: clk@1a0 {
>>   			compatible = "ti,clkctrl-l4-secure", "ti,clkctrl";
>>   			reg = <0x1a0 0x3c>;
>>   			#clock-cells = <2>;
> 
> Heh this is no longer needed since commit 6c3090520554
> ("clk: ti: clkctrl: Fix hidden dependency to node name")
> that added support for using the compatible name :)
> 
> Maybe you are using some older tree? Or else there's
> still something wrong somewhere.

I was using 5.7-rc1 as baseline so can't be that.

Let me try to check this one again.

-Tero
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Re: [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tero Kristo]

On 30/04/2020 07:55, Tero Kristo wrote:
> On 30/04/2020 01:07, Tony Lindgren wrote:
>> * Tero Kristo <t-kristo@ti.com> [200429 14:31]:
>>> The node name for these should be clk instead of clock. Otherwise the
>>> clock driver won't be able to map the parent/child relationships
>>> properly, and large number of clocks end up in orphaned state.
>>>
>>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>>> ---
>>>   arch/arm/boot/dts/omap44xx-clocks.dtsi | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap44xx-clocks.dtsi 
>>> b/arch/arm/boot/dts/omap44xx-clocks.dtsi
>>> index 532868591107..b82b1ca0e557 100644
>>> --- a/arch/arm/boot/dts/omap44xx-clocks.dtsi
>>> +++ b/arch/arm/boot/dts/omap44xx-clocks.dtsi
>>> @@ -1279,13 +1279,13 @@
>>>           #size-cells = <1>;
>>>           ranges = <0 0x1400 0x200>;
>>> -        l4_per_clkctrl: clock@20 {
>>> +        l4_per_clkctrl: clk@20 {
>>>               compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
>>>               reg = <0x20 0x144>;
>>>               #clock-cells = <2>;
>>>           };
>>> -        l4_secure_clkctrl: clock@1a0 {
>>> +        l4_secure_clkctrl: clk@1a0 {
>>>               compatible = "ti,clkctrl-l4-secure", "ti,clkctrl";
>>>               reg = <0x1a0 0x3c>;
>>>               #clock-cells = <2>;
>>
>> Heh this is no longer needed since commit 6c3090520554
>> ("clk: ti: clkctrl: Fix hidden dependency to node name")
>> that added support for using the compatible name :)
>>
>> Maybe you are using some older tree? Or else there's
>> still something wrong somewhere.
> 
> I was using 5.7-rc1 as baseline so can't be that.
> 
> Let me try to check this one again.

Ok you can ignore this and patch #2 for omap5 for similar case. It seems 
like the patch 6c3090520554 actually forgot to fix the subclock names, 
and it causes issues in mixed clock node setup. Will post a fix against 
the clock driver shortly.

-Tero

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Re: [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tony Lindgren]

* Tero Kristo <t-kristo@ti.com> [200430 08:35]:
> On 30/04/2020 07:55, Tero Kristo wrote:
> > On 30/04/2020 01:07, Tony Lindgren wrote:
> > > Heh this is no longer needed since commit 6c3090520554
> > > ("clk: ti: clkctrl: Fix hidden dependency to node name")
> > > that added support for using the compatible name :)
> > > 
> > > Maybe you are using some older tree? Or else there's
> > > still something wrong somewhere.
> > 
> > I was using 5.7-rc1 as baseline so can't be that.
> > 
> > Let me try to check this one again.
> 
> Ok you can ignore this and patch #2 for omap5 for similar case. It seems
> like the patch 6c3090520554 actually forgot to fix the subclock names, and
> it causes issues in mixed clock node setup. Will post a fix against the
> clock driver shortly.

OK good to hear.

Thanks,

Tony

Re: [PATCH 1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [200430 20:26]:
> * Tero Kristo <t-kristo@ti.com> [200430 08:35]:
> > On 30/04/2020 07:55, Tero Kristo wrote:
> > > On 30/04/2020 01:07, Tony Lindgren wrote:
> > > > Heh this is no longer needed since commit 6c3090520554
> > > > ("clk: ti: clkctrl: Fix hidden dependency to node name")
> > > > that added support for using the compatible name :)
> > > > 
> > > > Maybe you are using some older tree? Or else there's
> > > > still something wrong somewhere.
> > > 
> > > I was using 5.7-rc1 as baseline so can't be that.
> > > 
> > > Let me try to check this one again.
> > 
> > Ok you can ignore this and patch #2 for omap5 for similar case. It seems
> > like the patch 6c3090520554 actually forgot to fix the subclock names, and
> > it causes issues in mixed clock node setup. Will post a fix against the
> > clock driver shortly.
> 
> OK good to hear.

Applying all but the first two patches into omap-for-v5.8/dt thanks.

Tony