From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 450E3C433DF for ; Tue, 2 Jun 2020 13:52:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A9472074B for ; Tue, 2 Jun 2020 13:52:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726814AbgFBNv7 (ORCPT ); Tue, 2 Jun 2020 09:51:59 -0400 Received: from muru.com ([72.249.23.125]:56720 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725940AbgFBNv7 (ORCPT ); Tue, 2 Jun 2020 09:51:59 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 50EC180C5; Tue, 2 Jun 2020 13:52:49 +0000 (UTC) Date: Tue, 2 Jun 2020 06:51:55 -0700 From: Tony Lindgren To: Grygorii Strashko Cc: Drew Fustini , linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?Q?Beno=C3=AEt?= Cousson , Rob Herring , devicetree@vger.kernel.org, Santosh Shilimkar , Suman Anna , Haojian Zhuang , Linus Walleij , linux-gpio@vger.kernel.org Subject: Re: [PATCH] ARM: dts: AM33xx-l4: add gpio-ranges Message-ID: <20200602135155.GE37466@atomide.com> References: <20200602131428.GA496390@x1> <803e2d78-28ba-0816-dbb5-d441d7659a91@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <803e2d78-28ba-0816-dbb5-d441d7659a91@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org * Grygorii Strashko [200602 13:44]: > > > On 02/06/2020 16:14, Drew Fustini wrote: > > Add gpio-ranges properties to the gpio controller nodes. > > > > These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE > > REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table > > 4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1]. > > A csv file with this data is available for reference [2]. > > It will be good if you can explain not only "what" is changed, but > also "why" it's needed in commit message. Also, please check (again) that this is the same for all the am3 variants. For omap3, we had different pad assignments even between SoC revisions. Different pad routings should be easy to deal with in the dts if needed though. Regards, Tony