From: Jisheng Zhang <Jisheng.Zhang@synaptics.com> To: Vidya Sagar <vidyas@nvidia.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Rob Herring <robh@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Jingoo Han <jingoohan1@gmail.com>, Kukjin Kim <kgene@kernel.org>, Krzysztof Kozlowski <krzk@kernel.org>, Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, "Yue Wang" <yue.wang@Amlogic.com>, Kevin Hilman <khilman@baylibre.com>, "Neil Armstrong" <narmstrong@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, Jesper Nilsson <jesper.nilsson@axis.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Xiaowei Song <songxiaowei@hisilicon.com>, Binghui Wang <wangbinghui@hisilicon.com>, Andy Gross <agross@kernel.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Stanimir Varbanov <svarbanov@mm-sol.com>, Pratyush Anand <pratyush.anand@gmail.com>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, "Kunihiko Hayashi" <hayashi.kunihiko@socionext.com>, Masahiro Yamada <yamada.masahiro@socionext.com>, "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-samsung-soc@vger.kernel.org" <linux-samsung-soc@vger.kernel.org>, "linux-amlogic@lists.infradead.org" <linux-amlogic@lists.infradead.org>, "linux-arm-kernel@axis.com" <linux-arm-kernel@axis.com>, "linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>, "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org> Subject: Re: [PATCH v2 0/5] PCI: dwc: improve msi handling Date: Tue, 6 Oct 2020 14:36:47 +0800 [thread overview] Message-ID: <20201006143647.3f989340@xhacker.debian> (raw) In-Reply-To: <b977d9b4-cc98-e817-0d51-8f2c6ba1445d@nvidia.com> On Tue, 6 Oct 2020 11:56:34 +0530 Vidya Sagar wrote: > > > Hi, Hi, > I would like to verify this series along with the other series "PCI: > dwc: fix two MSI issues" on Tegra194. I tried to apply these series on > both linux-next and Lorenzo's pci/dwc branches but there seem to be non > trivial conflicts. Could you please tell me which branch I can use and > apply these series cleanly? This is a fix, so I thought the series would be picked up in v5.9, so the series is patched against v5.9-rcN could you please try v5 https://lkml.org/lkml/2020/9/29/2511 on v5.9-rc7? Thanks > FWIW, I acknowledge that the existing code does leak MSI target page > every time system goes through suspend-resume sequence on Tegra194. > > Thanks, > Vidya Sagar > > On 9/24/2020 4:35 PM, Jisheng Zhang wrote: > > External email: Use caution opening links or attachments > > > > > > Improve the msi code: > > 1. Add proper error handling. > > 2. Move dw_pcie_msi_init() from each users to designware host to solve > > msi page leakage in resume path. > > > > Since v1: > > - add proper error handling patches. > > - solve the msi page leakage by moving dw_pcie_msi_init() from each > > users to designware host > > > > > > Jisheng Zhang (5): > > PCI: dwc: Call dma_unmap_page() before freeing the msi page > > PCI: dwc: Check alloc_page() return value > > PCI: dwc: Rename dw_pcie_free_msi to dw_pcie_msi_deinit > > PCI: dwc: Skip PCIE_MSI_INTR0* programming if MSI is disabled > > PCI: dwc: Move dw_pcie_msi_init() from each users to designware host > > > > drivers/pci/controller/dwc/pci-dra7xx.c | 1 + > > drivers/pci/controller/dwc/pci-exynos.c | 2 - > > drivers/pci/controller/dwc/pci-imx6.c | 3 -- > > drivers/pci/controller/dwc/pci-meson.c | 8 ---- > > drivers/pci/controller/dwc/pcie-artpec6.c | 10 ----- > > .../pci/controller/dwc/pcie-designware-host.c | 43 +++++++++++++------ > > .../pci/controller/dwc/pcie-designware-plat.c | 3 -- > > drivers/pci/controller/dwc/pcie-designware.h | 9 +++- > > drivers/pci/controller/dwc/pcie-histb.c | 3 -- > > drivers/pci/controller/dwc/pcie-kirin.c | 3 -- > > drivers/pci/controller/dwc/pcie-qcom.c | 3 -- > > drivers/pci/controller/dwc/pcie-spear13xx.c | 1 - > > drivers/pci/controller/dwc/pcie-tegra194.c | 2 - > > drivers/pci/controller/dwc/pcie-uniphier.c | 9 +--- > > 14 files changed, 38 insertions(+), 62 deletions(-) > > > > -- > > 2.28.0 > >
next prev parent reply other threads:[~2020-10-06 6:37 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-24 11:05 Jisheng Zhang 2020-09-24 11:05 ` [PATCH v2 1/5] PCI: dwc: Call dma_unmap_page() before freeing the msi page Jisheng Zhang 2020-09-24 11:48 ` Gustavo Pimentel 2020-09-24 11:06 ` [PATCH v2 2/5] PCI: dwc: Check alloc_page() return value Jisheng Zhang 2020-09-24 11:47 ` Gustavo Pimentel 2020-09-29 17:29 ` Marc Zyngier 2020-09-30 1:23 ` Jisheng Zhang 2020-09-24 11:06 ` [PATCH v2 3/5] PCI: dwc: Rename dw_pcie_free_msi to dw_pcie_msi_deinit Jisheng Zhang 2020-09-24 11:49 ` Gustavo Pimentel 2020-09-24 11:07 ` [PATCH v2 4/5] PCI: dwc: Skip PCIE_MSI_INTR0* programming if MSI is disabled Jisheng Zhang 2020-09-24 11:49 ` Gustavo Pimentel 2020-09-24 11:07 ` [PATCH v2 5/5] PCI: dwc: Move dw_pcie_msi_init() from each users to designware host Jisheng Zhang 2020-10-08 5:43 ` Vidya Sagar 2021-03-07 22:10 ` Krzysztof Wilczyński 2021-03-11 6:50 ` Jisheng Zhang 2020-09-25 8:53 ` [PATCH v2 0/5] PCI: dwc: improve msi handling Jon Hunter 2020-09-25 9:17 ` Jisheng Zhang 2020-09-25 9:27 ` Jisheng Zhang 2020-09-25 15:13 ` Jon Hunter 2020-09-27 8:28 ` Jisheng Zhang 2020-09-28 17:46 ` Jon Hunter 2020-09-29 10:48 ` Jisheng Zhang 2020-09-29 13:22 ` Jon Hunter 2020-09-29 17:25 ` Marc Zyngier 2020-09-29 18:02 ` Jon Hunter 2020-09-29 18:12 ` Marc Zyngier 2020-10-06 6:26 ` Vidya Sagar 2020-10-06 6:36 ` Jisheng Zhang [this message] 2020-10-08 5:32 ` Vidya Sagar 2020-10-09 8:37 ` [PATCH] PCI: dwc: Move dw_pcie_msi_init() from each users to designware host Jisheng Zhang
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20201006143647.3f989340@xhacker.debian \ --to=jisheng.zhang@synaptics.com \ --cc=agross@kernel.org \ --cc=bhelgaas@google.com \ --cc=bjorn.andersson@linaro.org \ --cc=festevam@gmail.com \ --cc=gustavo.pimentel@synopsys.com \ --cc=hayashi.kunihiko@socionext.com \ --cc=hongxing.zhu@nxp.com \ --cc=jbrunet@baylibre.com \ --cc=jesper.nilsson@axis.com \ --cc=jingoohan1@gmail.com \ --cc=jonathanh@nvidia.com \ --cc=kernel@pengutronix.de \ --cc=kgene@kernel.org \ --cc=khilman@baylibre.com \ --cc=kishon@ti.com \ --cc=krzk@kernel.org \ --cc=l.stach@pengutronix.de \ --cc=linux-amlogic@lists.infradead.org \ --cc=linux-arm-kernel@axis.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-imx@nxp.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-omap@vger.kernel.org \ --cc=linux-pci@vger.kernel.org \ --cc=linux-samsung-soc@vger.kernel.org \ --cc=linux-tegra@vger.kernel.org \ --cc=lorenzo.pieralisi@arm.com \ --cc=martin.blumenstingl@googlemail.com \ --cc=narmstrong@baylibre.com \ --cc=pratyush.anand@gmail.com \ --cc=robh@kernel.org \ --cc=s.hauer@pengutronix.de \ --cc=shawnguo@kernel.org \ --cc=songxiaowei@hisilicon.com \ --cc=svarbanov@mm-sol.com \ --cc=thierry.reding@gmail.com \ --cc=vidyas@nvidia.com \ --cc=wangbinghui@hisilicon.com \ --cc=yamada.masahiro@socionext.com \ --cc=yue.wang@Amlogic.com \ --subject='Re: [PATCH v2 0/5] PCI: dwc: improve msi handling' \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).