From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C56DFC63777 for ; Tue, 1 Dec 2020 00:37:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 77B0920709 for ; Tue, 1 Dec 2020 00:37:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="g2nEGcED" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729464AbgLAAhT (ORCPT ); Mon, 30 Nov 2020 19:37:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729040AbgLAAhS (ORCPT ); Mon, 30 Nov 2020 19:37:18 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 920AEC0613D2 for ; Mon, 30 Nov 2020 16:36:38 -0800 (PST) Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 04C3931D; Tue, 1 Dec 2020 01:36:36 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1606782997; bh=QrZzDHpOcsK4YhRz1DEz1CyWpFmoIXil5VmlG/oFXbU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=g2nEGcEDMuHhjDpfc8LoarSmdk5bbuwDXBXuIGbM25s7v7mBNsb63AAu6oD1WWQZ6 GEhypiumBHu/PHTHTWnygDJoG/vUGyC6hflsXwHT3Q4OHyzowG70sQYKYDp5HS9zwB a3qP3QFrE/71jINkMYT+mQYxIRi4U291N3UFDQ5U= Date: Tue, 1 Dec 2020 02:36:28 +0200 From: Laurent Pinchart To: Tomi Valkeinen Cc: Sebastian Reichel , Nikhil Devshatwar , linux-omap@vger.kernel.org, dri-devel@lists.freedesktop.org, Sekhar Nori , Tony Lindgren , hns@goldelico.com Subject: Re: [PATCH v4 76/80] drm/omap: dsi: cleanup initial vc setup Message-ID: <20201201003628.GU25713@pendragon.ideasonboard.com> References: <20201124124538.660710-1-tomi.valkeinen@ti.com> <20201124124538.660710-77-tomi.valkeinen@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201124124538.660710-77-tomi.valkeinen@ti.com> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi Tomi, Thank you for the patch. On Tue, Nov 24, 2020 at 02:45:34PM +0200, Tomi Valkeinen wrote: > As we now have a fixed setup for VCs (VC0 for video stream, VC1 for > commands), we can simplify the VC setup. > > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/omapdrm/dss/dsi.c | 85 +++++++++++-------------------- > 1 file changed, 31 insertions(+), 54 deletions(-) > > diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c > index ff8ace957291..27d0d119668b 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dsi.c > +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c > @@ -2017,40 +2017,6 @@ static void dsi_vc_initial_config(struct dsi_data *dsi, int vc) > dsi->vc[vc].source = DSI_VC_SOURCE_L4; > } > > -static int dsi_vc_config_source(struct dsi_data *dsi, int vc, > - enum dsi_vc_source source) > -{ > - if (dsi->vc[vc].source == source) > - return 0; > - > - DSSDBG("Source config of VC %d", vc); > - > - dsi_sync_vc(dsi, vc); > - > - dsi_vc_enable(dsi, vc, 0); > - > - /* VC_BUSY */ > - if (!wait_for_bit_change(dsi, DSI_VC_CTRL(vc), 15, 0)) { > - DSSERR("vc(%d) busy when trying to config for VP\n", vc); > - return -EIO; > - } > - > - /* SOURCE, 0 = L4, 1 = video port */ > - REG_FLD_MOD(dsi, DSI_VC_CTRL(vc), source, 1, 1); > - > - /* DCS_CMD_ENABLE */ > - if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) { > - bool enable = source == DSI_VC_SOURCE_VP; > - REG_FLD_MOD(dsi, DSI_VC_CTRL(vc), enable, 30, 30); > - } > - > - dsi_vc_enable(dsi, vc, 1); > - > - dsi->vc[vc].source = source; > - > - return 0; > -} > - > static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int vc, > bool enable) > { > @@ -2072,10 +2038,6 @@ static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int vc, > dsi_if_enable(dsi, 1); > > dsi_force_tx_stop_mode_io(dsi); > - > - /* start the DDR clock by sending a NULL packet */ > - if (dsi->vm_timings.ddr_clk_always_on && enable) > - dsi_vc_send_null(dsi, vc, dsi->dsidev->channel); > } > > static void dsi_vc_flush_long_data(struct dsi_data *dsi, int vc) > @@ -2270,8 +2232,6 @@ static int dsi_vc_send_long(struct dsi_data *dsi, int vc, > return -EINVAL; > } > > - dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_L4); > - > dsi_vc_write_long_header(dsi, vc, msg->channel, msg->type, msg->tx_len, 0); > > p = msg->tx_buf; > @@ -2331,8 +2291,6 @@ static int dsi_vc_send_short(struct dsi_data *dsi, int vc, > DSSDBG("dsi_vc_send_short(ch%d, dt %#x, b1 %#x, b2 %#x)\n", > vc, msg->type, pkt.header[1], pkt.header[2]); > > - dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_L4); > - > if (FLD_GET(dsi_read_reg(dsi, DSI_VC_CTRL(vc)), 16, 16)) { > DSSERR("ERROR FIFO FULL, aborting transfer\n"); > return -EINVAL; > @@ -3351,8 +3309,6 @@ static void dsi_update_screen_dispc(struct dsi_data *dsi) > > DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h); > > - dsi_vc_config_source(dsi, vc, DSI_VC_SOURCE_VP); > - > bytespp = mipi_dsi_pixel_format_to_bpp(dsi->pix_fmt) / 8; > bytespl = w * bytespp; > bytespf = bytespl * h; > @@ -3522,9 +3478,7 @@ static int dsi_update_channel(struct omap_dss_device *dssdev, int vc) > > dsi_set_ulps_auto(dsi, false); > > - dsi_vc_enable_hs(dssdev, vc, !(dsi->dsidev->mode_flags & MIPI_DSI_MODE_LPM)); Why is this not needed anymore ? > - > - r = _dsi_send_nop(dsi, vc, dsi->dsidev->channel); > + r = _dsi_send_nop(dsi, VC_CMD, dsi->dsidev->channel); > if (r < 0) { > DSSWARN("failed to send nop between frames: %d\n", r); > goto err; > @@ -3649,6 +3603,35 @@ static int dsi_configure_dsi_clocks(struct dsi_data *dsi) > return 0; > } > > +static void dsi_setup_dsi_vcs(struct dsi_data *dsi) > +{ > + /* Setup VC_CMD for LP and cpu transfers */ > + REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_CMD), 0, 9, 9); /* LP */ > + > + REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_CMD), 0, 1, 1); /* SOURCE_L4 */ > + dsi->vc[VC_CMD].source = DSI_VC_SOURCE_L4; > + > + /* Setup VC_VIDEO for HS and dispc transfers */ > + REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 9, 9); /* HS */ > + > + REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 1, 1); /* SOURCE_VP */ > + dsi->vc[VC_VIDEO].source = DSI_VC_SOURCE_VP; > + > + if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) > + REG_FLD_MOD(dsi, DSI_VC_CTRL(VC_VIDEO), 1, 30, 30); /* DCS_CMD_ENABLE */ > + > + dsi_vc_enable(dsi, VC_CMD, 1); > + dsi_vc_enable(dsi, VC_VIDEO, 1); > + > + dsi_if_enable(dsi, 1); > + > + dsi_force_tx_stop_mode_io(dsi); > + > + /* start the DDR clock by sending a NULL packet */ > + if (dsi->vm_timings.ddr_clk_always_on) > + dsi_vc_send_null(dsi, VC_CMD, dsi->dsidev->channel); > +} > + > static int dsi_init_dsi(struct dsi_data *dsi) > { > int r; > @@ -3691,13 +3674,7 @@ static int dsi_init_dsi(struct dsi_data *dsi) > if (r) > goto err3; > > - /* enable interface */ > - dsi_vc_enable(dsi, 0, 1); > - dsi_vc_enable(dsi, 1, 1); > - dsi_vc_enable(dsi, 2, 1); > - dsi_vc_enable(dsi, 3, 1); > - dsi_if_enable(dsi, 1); > - dsi_force_tx_stop_mode_io(dsi); > + dsi_setup_dsi_vcs(dsi); > > return 0; > err3: -- Regards, Laurent Pinchart