From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@axis.com, lorenzo.pieralisi@arm.com,
robh@kernel.org, bhelgaas@google.com
Cc: kishon@ti.com, minghuan.Lian@nxp.com, jesper.nilsson@axis.com,
jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
hayashi.kunihiko@socionext.com,
Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCH 1/4] PCI: dwc: Change to use an array to store the structure of functions
Date: Thu, 7 Jan 2021 17:11:20 +0800 [thread overview]
Message-ID: <20210107091123.8616-2-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20210107091123.8616-1-Zhiqiang.Hou@nxp.com>
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
As there isn't dynamically adding and deleting a function's structure,
the list_head is not necessary for this case. Array is easier and
more efficient to search.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
.../pci/controller/dwc/pcie-designware-ep.c | 33 ++++++++-----------
drivers/pci/controller/dwc/pcie-designware.h | 3 +-
2 files changed, 15 insertions(+), 21 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index bcd1cd9ba8c8..e583700b5ba3 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -34,12 +34,8 @@ EXPORT_SYMBOL_GPL(dw_pcie_ep_init_notify);
struct dw_pcie_ep_func *
dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no)
{
- struct dw_pcie_ep_func *ep_func;
-
- list_for_each_entry(ep_func, &ep->func_list, list) {
- if (ep_func->func_no == func_no)
- return ep_func;
- }
+ if (func_no < ep->epc->max_functions)
+ return ep->funcs + func_no;
return NULL;
}
@@ -675,9 +671,9 @@ EXPORT_SYMBOL_GPL(dw_pcie_ep_init_complete);
int dw_pcie_ep_init(struct dw_pcie_ep *ep)
{
+ u8 i;
int ret;
void *addr;
- u8 func_no;
struct resource *res;
struct pci_epc *epc;
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
@@ -685,9 +681,7 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
struct platform_device *pdev = to_platform_device(dev);
struct device_node *np = dev->of_node;
const struct pci_epc_features *epc_features;
- struct dw_pcie_ep_func *ep_func;
-
- INIT_LIST_HEAD(&ep->func_list);
+ struct dw_pcie_ep_func *funcs;
if (!pci->dbi_base) {
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
@@ -750,18 +744,19 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
if (ret < 0)
epc->max_functions = 1;
- for (func_no = 0; func_no < epc->max_functions; func_no++) {
- ep_func = devm_kzalloc(dev, sizeof(*ep_func), GFP_KERNEL);
- if (!ep_func)
- return -ENOMEM;
+ funcs = devm_kcalloc(dev, epc->max_functions, sizeof(*funcs),
+ GFP_KERNEL);
+ if (!funcs)
+ return -ENOMEM;
+
+ ep->funcs = funcs;
- ep_func->func_no = func_no;
- ep_func->msi_cap = dw_pcie_ep_find_capability(ep, func_no,
+ for (i = 0; i < epc->max_functions; i++) {
+ funcs[i].func_no = i;
+ funcs[i].msi_cap = dw_pcie_ep_find_capability(ep, i,
PCI_CAP_ID_MSI);
- ep_func->msix_cap = dw_pcie_ep_find_capability(ep, func_no,
+ funcs[i].msix_cap = dw_pcie_ep_find_capability(ep, i,
PCI_CAP_ID_MSIX);
-
- list_add_tail(&ep_func->list, &ep->func_list);
}
if (ep->ops->ep_init)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 98710bf5ab0e..16d239c4d09b 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -221,7 +221,6 @@ struct dw_pcie_ep_ops {
};
struct dw_pcie_ep_func {
- struct list_head list;
u8 func_no;
u8 msi_cap; /* MSI capability offset */
u8 msix_cap; /* MSI-X capability offset */
@@ -229,7 +228,7 @@ struct dw_pcie_ep_func {
struct dw_pcie_ep {
struct pci_epc *epc;
- struct list_head func_list;
+ struct dw_pcie_ep_func *funcs;
const struct dw_pcie_ep_ops *ops;
phys_addr_t phys_base;
size_t addr_size;
--
2.17.1
next prev parent reply other threads:[~2021-01-07 9:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-07 9:11 [PATCH 0/4] PCI: dwc: Refine the EP code no functionality change Zhiqiang Hou
2021-01-07 9:11 ` Zhiqiang Hou [this message]
2021-01-07 9:11 ` [PATCH 2/4] PCI: dwc: Add CFG offset info into function's represented structure Zhiqiang Hou
2021-01-07 9:11 ` [PATCH 3/4] PCI: dwc: Rename callback function func_conf_select and its instance Zhiqiang Hou
2021-01-07 9:11 ` [PATCH 4/4] PCI: dwc: Change the parameter of function dw_pcie_ep_reset_bar() Zhiqiang Hou
2021-04-06 9:03 ` [PATCH 0/4] PCI: dwc: Refine the EP code no functionality change Z.q. Hou
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