[PATCH 0/2] Add HwSpinlock support for TI K3 AM64x SoCs

[PATCH 0/2] Add HwSpinlock support for TI K3 AM64x SoCs

[Suman Anna]

Hi Bjorn,

The following series extends the OMAP HwSpinlock driver to enable the
HwSpinlock IP present on the most recent TI K3 AM64x SoCs [1]. I will
post the DT nodes once the binding is acked and merged.

regards
Suman

[1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20210120202532.9011-1-d-gerlach@ti.com/

Suman Anna (2):
  dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs
  hwspinlock: omap: Add support for K3 AM64x SoCs

 .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
 drivers/hwspinlock/omap_hwspinlock.c          |  4 ++-
 2 files changed, 29 insertions(+), 1 deletion(-)

-- 
2.29.2

[PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs

[Suman Anna]

Update the existing OMAP HwSpinlock binding to include the info for
AM64x SoCs. There are some minor IP integration differences between
the AM64x SoCs and the previous AM65x and J721E SoC families. A new
example is also added showcasing the difference in the IP's presence
on the interconnect.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
index ac35491a6f65..ac146c0d628f 100644
--- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
+++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
@@ -14,6 +14,7 @@ properties:
     enum:
       - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
       - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
+      - ti,am64-hwspinlock   # for K3 AM64x SoCs
 
   reg:
     maxItems: 1
@@ -74,3 +75,28 @@ examples:
             };
         };
     };
+
+  - |
+    / {
+        /* K3 AM64x SoCs */
+        model = "Texas Instruments K3 AM642 SoC";
+        compatible = "ti,am642-evm", "ti,am642";
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        bus@f4000 {
+            compatible = "simple-bus";
+            #address-cells = <2>;
+            #size-cells = <2>;
+            ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
+                     <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
+                     <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */
+                     <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */
+
+            spinlock@2a000000 {
+                compatible = "ti,am64-hwspinlock";
+                reg = <0x00 0x2a000000 0x00 0x1000>;
+                #hwlock-cells = <1>;
+            };
+        };
+    };
-- 
2.29.2

[PATCH 2/2] hwspinlock: omap: Add support for K3 AM64x SoCs

[Suman Anna]

The AM64x SoC contains a HwSpinlock IP instance in the MAIN domain,
and is a minor variant of the IP on the current TI K3 SoCs such as
AM64x, J721E or J7200 SoCs. The IP is not built with the K3 safety
feature in hardware, and has slightly different integration into
the overall SoC.

Add the support for this IP through a new compatible.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 drivers/hwspinlock/omap_hwspinlock.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/hwspinlock/omap_hwspinlock.c b/drivers/hwspinlock/omap_hwspinlock.c
index 3b05560456ea..65dbf1ae3aa7 100644
--- a/drivers/hwspinlock/omap_hwspinlock.c
+++ b/drivers/hwspinlock/omap_hwspinlock.c
@@ -2,11 +2,12 @@
 /*
  * OMAP hardware spinlock driver
  *
- * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com
+ * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
  *
  * Contact: Simon Que <sque@ti.com>
  *          Hari Kanigeri <h-kanigeri2@ti.com>
  *          Ohad Ben-Cohen <ohad@wizery.com>
+ *          Suman Anna <s-anna@ti.com>
  */
 
 #include <linux/kernel.h>
@@ -165,6 +166,7 @@ static int omap_hwspinlock_remove(struct platform_device *pdev)
 static const struct of_device_id omap_hwspinlock_of_match[] = {
 	{ .compatible = "ti,omap4-hwspinlock", },
 	{ .compatible = "ti,am654-hwspinlock", },
+	{ .compatible = "ti,am64-hwspinlock", },
 	{ /* end */ },
 };
 MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
-- 
2.29.2

Re: [PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs

[Rob Herring]

On Mon, Jan 25, 2021 at 05:56:52PM -0600, Suman Anna wrote:
> Update the existing OMAP HwSpinlock binding to include the info for
> AM64x SoCs. There are some minor IP integration differences between
> the AM64x SoCs and the previous AM65x and J721E SoC families. A new
> example is also added showcasing the difference in the IP's presence
> on the interconnect.
> 
> Signed-off-by: Suman Anna <s-anna@ti.com>
> ---
>  .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> index ac35491a6f65..ac146c0d628f 100644
> --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> @@ -14,6 +14,7 @@ properties:
>      enum:
>        - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
>        - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
> +      - ti,am64-hwspinlock   # for K3 AM64x SoCs
>  
>    reg:
>      maxItems: 1
> @@ -74,3 +75,28 @@ examples:
>              };
>          };
>      };
> +
> +  - |
> +    / {
> +        /* K3 AM64x SoCs */
> +        model = "Texas Instruments K3 AM642 SoC";
> +        compatible = "ti,am642-evm", "ti,am642";
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        bus@f4000 {
> +            compatible = "simple-bus";
> +            #address-cells = <2>;
> +            #size-cells = <2>;
> +            ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
> +                     <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
> +                     <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */
> +                     <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */
> +
> +            spinlock@2a000000 {

Why are you doing the whole hierarchy here? Don't do that.

In any case, a new compatible doesn't warrant a whole new example, so 
drop the example.

> +                compatible = "ti,am64-hwspinlock";
> +                reg = <0x00 0x2a000000 0x00 0x1000>;
> +                #hwlock-cells = <1>;
> +            };
> +        };
> +    };
> -- 
> 2.29.2
> 

Re: [PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs

[Suman Anna]

Hi Rob,

On 2/9/21 11:00 AM, Rob Herring wrote:
> On Mon, Jan 25, 2021 at 05:56:52PM -0600, Suman Anna wrote:
>> Update the existing OMAP HwSpinlock binding to include the info for
>> AM64x SoCs. There are some minor IP integration differences between
>> the AM64x SoCs and the previous AM65x and J721E SoC families. A new
>> example is also added showcasing the difference in the IP's presence
>> on the interconnect.
>>
>> Signed-off-by: Suman Anna <s-anna@ti.com>
>> ---
>>  .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>> index ac35491a6f65..ac146c0d628f 100644
>> --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>> +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>> @@ -14,6 +14,7 @@ properties:
>>      enum:
>>        - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
>>        - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
>> +      - ti,am64-hwspinlock   # for K3 AM64x SoCs
>>  
>>    reg:
>>      maxItems: 1
>> @@ -74,3 +75,28 @@ examples:
>>              };
>>          };
>>      };
>> +
>> +  - |
>> +    / {
>> +        /* K3 AM64x SoCs */
>> +        model = "Texas Instruments K3 AM642 SoC";
>> +        compatible = "ti,am642-evm", "ti,am642";
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
>> +
>> +        bus@f4000 {
>> +            compatible = "simple-bus";
>> +            #address-cells = <2>;
>> +            #size-cells = <2>;
>> +            ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
>> +                     <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
>> +                     <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */
>> +                     <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */
>> +
>> +            spinlock@2a000000 {
> 
> Why are you doing the whole hierarchy here? Don't do that.

I added it because it's integration is slightly different and to help our
downstream consumers.

> 
> In any case, a new compatible doesn't warrant a whole new example, so 
> drop the example.

Yeah ok, will drop the example.

regards
Suman

> 
>> +                compatible = "ti,am64-hwspinlock";
>> +                reg = <0x00 0x2a000000 0x00 0x1000>;
>> +                #hwlock-cells = <1>;
>> +            };
>> +        };
>> +    };
>> -- 
>> 2.29.2
>>

Re: [PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs

[Bjorn Andersson]

On Tue 09 Feb 11:09 CST 2021, Suman Anna wrote:

> Hi Rob,
> 
> On 2/9/21 11:00 AM, Rob Herring wrote:
> > On Mon, Jan 25, 2021 at 05:56:52PM -0600, Suman Anna wrote:
> >> Update the existing OMAP HwSpinlock binding to include the info for
> >> AM64x SoCs. There are some minor IP integration differences between
> >> the AM64x SoCs and the previous AM65x and J721E SoC families. A new
> >> example is also added showcasing the difference in the IP's presence
> >> on the interconnect.
> >>
> >> Signed-off-by: Suman Anna <s-anna@ti.com>
> >> ---
> >>  .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
> >>  1 file changed, 26 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> >> index ac35491a6f65..ac146c0d628f 100644
> >> --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> >> +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
> >> @@ -14,6 +14,7 @@ properties:
> >>      enum:
> >>        - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
> >>        - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
> >> +      - ti,am64-hwspinlock   # for K3 AM64x SoCs
> >>  
> >>    reg:
> >>      maxItems: 1
> >> @@ -74,3 +75,28 @@ examples:
> >>              };
> >>          };
> >>      };
> >> +
> >> +  - |
> >> +    / {
> >> +        /* K3 AM64x SoCs */
> >> +        model = "Texas Instruments K3 AM642 SoC";
> >> +        compatible = "ti,am642-evm", "ti,am642";
> >> +        #address-cells = <2>;
> >> +        #size-cells = <2>;
> >> +
> >> +        bus@f4000 {
> >> +            compatible = "simple-bus";
> >> +            #address-cells = <2>;
> >> +            #size-cells = <2>;
> >> +            ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
> >> +                     <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
> >> +                     <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */
> >> +                     <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */
> >> +
> >> +            spinlock@2a000000 {
> > 
> > Why are you doing the whole hierarchy here? Don't do that.
> 
> I added it because it's integration is slightly different and to help our
> downstream consumers.
> 
> > 
> > In any case, a new compatible doesn't warrant a whole new example, so 
> > drop the example.
> 
> Yeah ok, will drop the example.
> 

I was just waiting for my build test to pass before pushing this and a
few other patches out, will drop the example from the patch here.  No
need to resend.

Thanks,
Bjorn

> regards
> Suman
> 
> > 
> >> +                compatible = "ti,am64-hwspinlock";
> >> +                reg = <0x00 0x2a000000 0x00 0x1000>;
> >> +                #hwlock-cells = <1>;
> >> +            };
> >> +        };
> >> +    };
> >> -- 
> >> 2.29.2
> >>
> 

Re: [PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs

[Suman Anna]

On 2/9/21 11:19 AM, Bjorn Andersson wrote:
> On Tue 09 Feb 11:09 CST 2021, Suman Anna wrote:
> 
>> Hi Rob,
>>
>> On 2/9/21 11:00 AM, Rob Herring wrote:
>>> On Mon, Jan 25, 2021 at 05:56:52PM -0600, Suman Anna wrote:
>>>> Update the existing OMAP HwSpinlock binding to include the info for
>>>> AM64x SoCs. There are some minor IP integration differences between
>>>> the AM64x SoCs and the previous AM65x and J721E SoC families. A new
>>>> example is also added showcasing the difference in the IP's presence
>>>> on the interconnect.
>>>>
>>>> Signed-off-by: Suman Anna <s-anna@ti.com>
>>>> ---
>>>>  .../bindings/hwlock/ti,omap-hwspinlock.yaml   | 26 +++++++++++++++++++
>>>>  1 file changed, 26 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>>>> index ac35491a6f65..ac146c0d628f 100644
>>>> --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>>>> +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml
>>>> @@ -14,6 +14,7 @@ properties:
>>>>      enum:
>>>>        - ti,omap4-hwspinlock  # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
>>>>        - ti,am654-hwspinlock  # for K3 AM65x, J721E and J7200 SoCs
>>>> +      - ti,am64-hwspinlock   # for K3 AM64x SoCs
>>>>  
>>>>    reg:
>>>>      maxItems: 1
>>>> @@ -74,3 +75,28 @@ examples:
>>>>              };
>>>>          };
>>>>      };
>>>> +
>>>> +  - |
>>>> +    / {
>>>> +        /* K3 AM64x SoCs */
>>>> +        model = "Texas Instruments K3 AM642 SoC";
>>>> +        compatible = "ti,am642-evm", "ti,am642";
>>>> +        #address-cells = <2>;
>>>> +        #size-cells = <2>;
>>>> +
>>>> +        bus@f4000 {
>>>> +            compatible = "simple-bus";
>>>> +            #address-cells = <2>;
>>>> +            #size-cells = <2>;
>>>> +            ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
>>>> +                     <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
>>>> +                     <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */
>>>> +                     <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */
>>>> +
>>>> +            spinlock@2a000000 {
>>>
>>> Why are you doing the whole hierarchy here? Don't do that.
>>
>> I added it because it's integration is slightly different and to help our
>> downstream consumers.
>>
>>>
>>> In any case, a new compatible doesn't warrant a whole new example, so 
>>> drop the example.
>>
>> Yeah ok, will drop the example.
>>
> 
> I was just waiting for my build test to pass before pushing this and a
> few other patches out, will drop the example from the patch here.  No
> need to resend.

Oops, didn't see this message in time. I have just posted my v2, and you can
pick that up directly as I had to remove the last line from the patch
description too.

Thanks,
Suman

> 
> Thanks,
> Bjorn
> 
>> regards
>> Suman
>>
>>>
>>>> +                compatible = "ti,am64-hwspinlock";
>>>> +                reg = <0x00 0x2a000000 0x00 0x1000>;
>>>> +                #hwlock-cells = <1>;
>>>> +            };
>>>> +        };
>>>> +    };
>>>> -- 
>>>> 2.29.2
>>>>
>>