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From: Tony Lindgren <tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: "Benoît Cousson" <bcousson@baylibre.com>, devicetree@vger.kernel.org
Subject: [PATCH 05/11] ARM: dts: Configure interconnect target module for omap5 sata
Date: Mon,  8 Mar 2021 17:11:37 +0200	[thread overview]
Message-ID: <20210308151143.27793-6-tony@atomide.com> (raw)
In-Reply-To: <20210308151143.27793-1-tony@atomide.com>

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/omap5-l4.dtsi | 28 +++++++++++++++++++++++++---
 arch/arm/boot/dts/omap5.dtsi    | 12 ------------
 2 files changed, 25 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -691,11 +691,33 @@ target-module@a000 {			/* 0x4a10a000, ap 63 22.0 */
 		};
 
 		target-module@40000 {			/* 0x4a140000, ap 101 16.0 */
-			compatible = "ti,sysc";
-			status = "disabled";
-			#address-cells = <1>;
+			compatible = "ti,sysc-omap4", "ti,sysc";
+			reg = <0x400fc 4>,
+			      <0x41100 4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			power-domains = <&prm_l3init>;
+			clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 0>;
+			clock-names = "fck";
 			#size-cells = <1>;
+			#address-cells = <1>;
 			ranges = <0x0 0x40000 0x10000>;
+
+			sata: sata@0 {
+				compatible = "snps,dwc-ahci";
+				reg = <0 0x1100>, <0x1100 0x8>;
+				interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&sata_phy>;
+				phy-names = "sata-phy";
+				clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
+				ports-implemented = <0x1>;
+			};
 		};
 	};
 
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -428,18 +428,6 @@ bandgap: bandgap@4a0021e0 {
 			#thermal-sensor-cells = <1>;
 		};
 
-		/* OCP2SCP3 */
-		sata: sata@4a141100 {
-			compatible = "snps,dwc-ahci";
-			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
-			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
-			phys = <&sata_phy>;
-			phy-names = "sata-phy";
-			clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
-			ti,hwmods = "sata";
-			ports-implemented = <0x1>;
-		};
-
 		target-module@56000000 {
 			compatible = "ti,sysc-omap4", "ti,sysc";
 			reg = <0x5600fe00 0x4>,
-- 
2.30.1

  parent reply	other threads:[~2021-03-08 15:12 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08 15:11 [PATCH 00/11] Update omap5 dts files to probe with genpd Tony Lindgren
2021-03-08 15:11 ` [PATCH 01/11] ARM: dts: Configure interconnect target module for omap5 dmm Tony Lindgren
2021-03-08 15:11 ` [PATCH 02/11] ARM: dts: Configure interconnect target module for omap5 emif Tony Lindgren
2021-03-08 15:11 ` [PATCH 03/11] ARM: dts: Configure interconnect target module for omap5 mpu Tony Lindgren
2021-03-08 15:11 ` [PATCH 04/11] ARM: dts: Configure interconnect target module for omap5 gpmc Tony Lindgren
2021-03-09  6:58   ` kernel test robot
2021-03-09  9:59     ` Tony Lindgren
2021-03-08 15:11 ` Tony Lindgren [this message]
2021-03-08 15:11 ` [PATCH 06/11] ARM: dts: Move omap5 mmio-sram out of l3 interconnect Tony Lindgren
2021-03-08 15:11 ` [PATCH 07/11] ARM: dts: Move omap5 l3-noc to a separate node Tony Lindgren
2021-03-08 15:11 ` [PATCH 08/11] ARM: dts: Configure simple-pm-bus for omap5 l4_wkup Tony Lindgren
2021-03-08 15:11 ` [PATCH 09/11] ARM: dts: Configure simple-pm-bus for omap5 l4_per Tony Lindgren
2021-03-08 15:11 ` [PATCH 10/11] ARM: dts: Configure simple-pm-bus for omap5 l4_cfg Tony Lindgren
2021-03-08 15:11 ` [PATCH 11/11] ARM: dts: Configure simple-pm-bus for omap5 l3 Tony Lindgren

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