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From: "H. Nikolaus Schaller" <hns@goldelico.com>
To: Nikolaus Schaller <hns@goldelico.com>
Cc: "Jonathan Bakker" <xc-racer2@live.ca>,
	"Philipp Rossak" <embed3d@gmail.com>,
	"open list:DRM PANEL DRIVERS" <dri-devel@lists.freedesktop.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-omap <linux-omap@vger.kernel.org>,
	"OpenPVRSGX Linux Driver Group" <openpvrsgx-devgroup@letux.org>,
	"Discussions about the Letux Kernel"
	<letux-kernel@openphoenux.org>,
	kernel@pyra-handheld.com, linux-mips@vger.kernel.org,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	linux-samsung-soc@vger.kernel.org,
	"David Airlie" <airlied@linux.ie>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>,
	"Paul Cercueil" <paul@crapouillou.net>,
	"Ralf Baechle" <ralf@linux-mips.org>,
	"Paul Burton" <paulburton@kernel.org>,
	"James Hogan" <jhogan@kernel.org>,
	"Kukjin Kim" <kgene@kernel.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Subject: Re: [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs
Date: Fri, 24 Apr 2020 22:43:30 +0200
Message-ID: <47E9ACFA-A5DE-4918-9C79-0C50FAA6E988@goldelico.com> (raw)
In-Reply-To: <3a451e360fed84bc40287678b4d6be13821cfbc0.1587760454.git.hns@goldelico.com>


> Am 24.04.2020 um 22:34 schrieb H. Nikolaus Schaller <hns@goldelico.com>:
> 
> The Imagination PVR/SGX GPU is part of several SoC from
> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo,
> Allwinner A83 and others.
> 
> With this binding, we describe how the SGX processor is
> interfaced to the SoC (registers and interrupt).
> 
> The interface also consists of clocks, reset, power but
> information from data sheets is vague and some SoC integrators
> (TI) deciced to use a PRCM wrapper (ti,sysc) which does

s/deciced/decided/

> all clock, reset and power-management through registers
> outside of the sgx register block.
> 
> Therefore all these properties are optional.
> 
> Tested by make dt_binding_check
> 
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
> .../devicetree/bindings/gpu/img,pvrsgx.yaml   | 150 ++++++++++++++++++
> 1 file changed, 150 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> new file mode 100644
> index 000000000000..33a9c4c6e784
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
> @@ -0,0 +1,150 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Imagination PVR/SGX GPU
> +
> +maintainers:
> +  - H. Nikolaus Schaller <hns@goldelico.com>
> +
> +description: |+
> +  This binding describes the Imagination SGX5 series of 3D accelerators which
> +  are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780,
> +  Allwinner A83, and Intel Poulsbo and CedarView and more.
> +
> +  For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations
> +
> +  The SGX node is usually a child node of some DT node belonging to the SoC
> +  which handles clocks, reset and general address space mapping of the SGX
> +  register area. If not, an optional clock can be specified here.

     ^^^ this is no longer that way. now clocks, reset etc. are part of this
         node but can be omitted if done by the parent node.

     => either remove this sentence or rewrite.

> +
> +properties:
> +  $nodename:
> +    pattern: '^gpu@[a-f0-9]+$'
> +  compatible:
> +    oneOf:
> +      - description: SGX530-121 based SoC
> +        items:
> +          - enum:
> +            - ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar
> +          - const: img,sgx530-121
> +          - const: img,sgx530
> +
> +      - description: SGX530-125 based SoC
> +        items:
> +          - enum:
> +            - ti,am3352-sgx530-125 # BeagleBone Black
> +            - ti,am3517-sgx530-125
> +            - ti,am4-sgx530-125
> +            - ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar
> +            - ti,ti81xx-sgx530-125
> +          - const: ti,omap3-sgx530-125
> +          - const: img,sgx530-125
> +          - const: img,sgx530
> +
> +      - description: SGX535-116 based SoC
> +        items:
> +          - const: intel,poulsbo-gma500-sgx535 # Atom Z5xx
> +          - const: img,sgx535-116
> +          - const: img,sgx535
> +
> +      - description: SGX540-116 based SoC
> +        items:
> +          - const: intel,medfield-gma-sgx540 # Atom Z24xx
> +          - const: img,sgx540-116
> +          - const: img,sgx540
> +
> +      - description: SGX540-120 based SoC
> +        items:
> +          - enum:
> +            - samsung,s5pv210-sgx540-120
> +            - ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar
> +          - const: img,sgx540-120
> +          - const: img,sgx540
> +
> +      - description: SGX540-130 based SoC
> +        items:
> +          - enum:
> +            - ingenic,jz4780-sgx540-130 # CI20
> +          - const: img,sgx540-130
> +          - const: img,sgx540
> +
> +      - description: SGX544-112 based SoC
> +        items:
> +          - const: ti,omap4470-sgx544-112
> +          - const: img,sgx544-112
> +          - const: img,sgx544
> +
> +      - description: SGX544-115 based SoC
> +        items:
> +          - enum:
> +            - allwinner,sun8i-a31-sgx544-115
> +            - allwinner,sun8i-a31s-sgx544-115
> +            - allwinner,sun8i-a83t-sgx544-115 # Banana-Pi-M3 (Allwinner A83T) and similar
> +          - const: img,sgx544-115
> +          - const: img,sgx544
> +
> +      - description: SGX544-116 based SoC
> +        items:
> +          - enum:
> +            - ti,dra7-sgx544-116 # DRA7
> +            - ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar
> +          - const: img,sgx544-116
> +          - const: img,sgx544
> +
> +      - description: SGX545 based SoC
> +        items:
> +          - const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500
> +          - const: img,sgx545-116
> +          - const: img,sgx545
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interrupt-names:
> +    maxItems: 1
> +    items:
> +      - const: sgx
> +
> +  clocks:
> +    maxItems: 4
> +
> +  clock-names:
> +    maxItems: 4
> +    items:
> +      - const: core
> +      - const: sys
> +      - const: mem
> +      - const: hyd
> +
> +  sgx-supply: true
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |+
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    gpu: gpu@fe00 {
> +      compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544";
> +      reg = <0xfe00 0x200>;
> +      interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +
> +...
> -- 
> 2.25.1
> 


  reply index

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-24 20:34 [PATCH v7 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
2020-04-24 20:43   ` H. Nikolaus Schaller [this message]
2020-04-26 13:11   ` Paul Cercueil
2020-05-02 20:26     ` H. Nikolaus Schaller
2020-05-03 12:52       ` Paul Cercueil
2020-05-03 13:31         ` H. Nikolaus Schaller
2020-05-03 14:18           ` Paul Cercueil
2020-05-03 15:01             ` Tony Lindgren
2020-05-15  7:58               ` H. Nikolaus Schaller
2020-05-03 16:41             ` H. Nikolaus Schaller
2020-05-15  7:18               ` H. Nikolaus Schaller
2020-04-26 19:36   ` Philipp Rossak
2020-04-26 20:59     ` H. Nikolaus Schaller
2020-05-05 15:53   ` Rob Herring
2020-05-15  7:59     ` H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 02/12] ARM: DTS: am33xx: add sgx gpu child node H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 03/12] ARM: DTS: am3517: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 04/12] ARM: DTS: omap34xx: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 05/12] ARM: DTS: omap36xx: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 06/12] ARM: DTS: omap4: " H. Nikolaus Schaller
2020-04-26 12:50   ` Paul Cercueil
2020-04-28  7:59     ` H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 07/12] ARM: DTS: omap5: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 08/12] arm: dts: s5pv210: Add node for SGX 540 H. Nikolaus Schaller
2020-04-26 12:56   ` Paul Cercueil
2020-04-26 14:57     ` Jonathan Bakker
2020-04-27 15:46       ` Krzysztof Kozlowski
2020-04-28 21:39         ` Jonathan Bakker
2020-04-28 22:58           ` Jonathan Bakker
2020-04-29  8:47             ` Maxime Ripard
2020-04-29 12:26             ` Paul Cercueil
2020-04-24 20:34 ` [PATCH v7 09/12] ARM: dts: sun6i: a31: add sgx gpu child node H. Nikolaus Schaller
2020-04-26 12:53   ` Paul Cercueil
2020-04-26 19:31     ` Philipp Rossak
2020-04-24 20:34 ` [PATCH v7 10/12] ARM: dts: sun6i: a31s: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 11/12] ARM: dts: sun8i: a83t: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 12/12] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller

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