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From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Jisheng Zhang <Jisheng.Zhang@synaptics.com>,
	Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	<linux-pci@vger.kernel.org>,
	Binghui Wang <wangbinghui@hisilicon.com>,
	"Bjorn Andersson" <bjorn.andersson@linaro.org>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	<linux-arm-kernel@axis.com>, Vidya Sagar <vidyas@nvidia.com>,
	Fabio Estevam <festevam@gmail.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	<linux-tegra@vger.kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Kukjin Kim <kgene@kernel.org>, NXP Linux Team <linux-imx@nxp.com>,
	Xiaowei Song <songxiaowei@hisilicon.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	<linux-arm-msm@vger.kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	Yue Wang <yue.wang@amlogic.com>,
	<linux-samsung-soc@vger.kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	<linux-amlogic@lists.infradead.org>, <linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Jingoo Han <jingoohan1@gmail.com>, Andy Gross <agross@kernel.org>,
	<linux-kernel@vger.kernel.org>,
	"Stanimir Varbanov" <svarbanov@mm-sol.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH v2 0/5] PCI: dwc: improve msi handling
Date: Tue, 29 Sep 2020 19:02:16 +0100	[thread overview]
Message-ID: <6ead62a5-6ad5-bde8-a5df-93c0f8029f65@nvidia.com> (raw)
In-Reply-To: <d4a6eea3c5e33a3a4056885419df95a7@kernel.org>


On 29/09/2020 18:25, Marc Zyngier wrote:
> On 2020-09-29 14:22, Jon Hunter wrote:
>> Hi Jisheng,
>>
>> On 29/09/2020 11:48, Jisheng Zhang wrote:
>>> Hi Jon,
>>>
>>> On Fri, 25 Sep 2020 09:53:45 +0100 Jon Hunter wrote:
>>>
>>>>
>>>> On 24/09/2020 12:05, Jisheng Zhang wrote:
>>>>> Improve the msi code:
>>>>> 1. Add proper error handling.
>>>>> 2. Move dw_pcie_msi_init() from each users to designware host to solve
>>>>> msi page leakage in resume path.
>>>>
>>>> Apologies if this is slightly off topic, but I have been meaning to ask
>>>> about MSIs and PCI. On Tegra194 which uses the DWC PCI driver,
>>>> whenever we
>>>> hotplug CPUs we see the following warnings ...
>>>>
>>>>  [      79.068351] WARNING KERN IRQ70: set affinity failed(-22).
>>>>  [      79.068362] WARNING KERN IRQ71: set affinity failed(-22).
>>>>
>>>
>>> I tried to reproduce this issue on Synaptics SoC, but can't reproduce
>>> it.
>>> Per my understanding of the code in kernel/irq/cpuhotplug.c, this
>>> warning
>>> happened when we migrate irqs away from the offline cpu, this implicitly
>>> implies that before this point the irq has bind to the offline cpu,
>>> but how
>>> could this happen given current dw_pci_msi_set_affinity() implementation
>>> always return -EINVAL
>>
>> By default the smp_affinity should be set so that all CPUs can be
>> interrupted ...
>>
>> $ cat /proc/irq/70/smp_affinity
>> 0xff
>>
>> In my case there are 8 CPUs and so 0xff implies that the interrupt can
>> be triggered on any of the 8 CPUs.
>>
>> Do you see the set_affinity callback being called for the DWC irqchip in
>> migrate_one_irq()?
> 
> The problem is common to all MSI implementations that end up muxing
> all the end-point MSIs into a single interrupt. With these systems,
> you cannot set the affinity of individual MSIs (they don't target a
> CPU, they target another interrupt... braindead). Only the mux
> interrupt can have its affinity changed.
> 
> So returning -EINVAL is the right thing to do.

Right, so if that is the case, then surely there should be some way to
avoid these warnings because they are not relevant?

Cheers
Jon

-- 
nvpublic

  reply	other threads:[~2020-09-29 18:02 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-24 11:05 Jisheng Zhang
2020-09-24 11:05 ` [PATCH v2 1/5] PCI: dwc: Call dma_unmap_page() before freeing the msi page Jisheng Zhang
2020-09-24 11:48   ` Gustavo Pimentel
2020-09-24 11:06 ` [PATCH v2 2/5] PCI: dwc: Check alloc_page() return value Jisheng Zhang
2020-09-24 11:47   ` Gustavo Pimentel
2020-09-29 17:29   ` Marc Zyngier
2020-09-30  1:23     ` Jisheng Zhang
2020-09-24 11:06 ` [PATCH v2 3/5] PCI: dwc: Rename dw_pcie_free_msi to dw_pcie_msi_deinit Jisheng Zhang
2020-09-24 11:49   ` Gustavo Pimentel
2020-09-24 11:07 ` [PATCH v2 4/5] PCI: dwc: Skip PCIE_MSI_INTR0* programming if MSI is disabled Jisheng Zhang
2020-09-24 11:49   ` Gustavo Pimentel
2020-09-24 11:07 ` [PATCH v2 5/5] PCI: dwc: Move dw_pcie_msi_init() from each users to designware host Jisheng Zhang
2020-10-08  5:43   ` Vidya Sagar
2021-03-07 22:10   ` Krzysztof Wilczyński
2021-03-11  6:50     ` Jisheng Zhang
2020-09-25  8:53 ` [PATCH v2 0/5] PCI: dwc: improve msi handling Jon Hunter
2020-09-25  9:17   ` Jisheng Zhang
2020-09-25  9:27     ` Jisheng Zhang
2020-09-25 15:13       ` Jon Hunter
2020-09-27  8:28         ` Jisheng Zhang
2020-09-28 17:46           ` Jon Hunter
2020-09-29 10:48   ` Jisheng Zhang
2020-09-29 13:22     ` Jon Hunter
2020-09-29 17:25       ` Marc Zyngier
2020-09-29 18:02         ` Jon Hunter [this message]
2020-09-29 18:12           ` Marc Zyngier
2020-10-06  6:26 ` Vidya Sagar
2020-10-06  6:36   ` Jisheng Zhang
2020-10-08  5:32     ` Vidya Sagar
2020-10-09  8:37       ` [PATCH] PCI: dwc: Move dw_pcie_msi_init() from each users to designware host Jisheng Zhang

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