From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53AABC31E40 for ; Tue, 15 Sep 2020 22:04:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1E3772064B for ; Tue, 15 Sep 2020 22:04:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600207472; bh=6zE0t0oBSXBMiJpCVysJvWDi1OuIiOE0z/RDPqK5QEo=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=gLjMlklQIBX3XCixFy8pLpPnaih640PGVkZx7bR6sLosYTao3XJWhsPomOtVajvFh znKMzNGPXIb0Hj+H9RwXsu0QV1dGwnpeHTwv0blAuzCpoZHojpX+Un8XxWjktfA8wC 14DC3MBqJ0Q60aWXQziL/aHuR4O+XcQMw2aAV8+o= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728035AbgIOWEW (ORCPT ); Tue, 15 Sep 2020 18:04:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:52466 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727708AbgIOWDM (ORCPT ); Tue, 15 Sep 2020 18:03:12 -0400 Received: from mail-ot1-f53.google.com (mail-ot1-f53.google.com [209.85.210.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B62E121974; Tue, 15 Sep 2020 22:03:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600207391; bh=6zE0t0oBSXBMiJpCVysJvWDi1OuIiOE0z/RDPqK5QEo=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=nNCs3AKsNhyvwcxJiuYiwuCZk8aJhCrWu2hHimpp/80ZVp0COd9LLbRvKE7dYfj9M UORNn/A+ChZMXAgv8WUY92cLPIDrP1OUaIAq8koeKyYALz8L3fH6X5tH8exC0BtO4g z6E2UHuTiI3HCcJiuVDfh+u+2xN/iP4Lh+BzdNkg= Received: by mail-ot1-f53.google.com with SMTP id w25so4761987otk.8; Tue, 15 Sep 2020 15:03:11 -0700 (PDT) X-Gm-Message-State: AOAM531NQIIxLzhVLM+Klo3Lx2z7QE5n1nnjONnDPwOguca9waIswJfS P05c7x7FHnG6Ool8ckXG//iLxvI+/IWdRMWzFQ== X-Google-Smtp-Source: ABdhPJyEQLpI+Is0tXGd/BZAER5EHEJNoezWAKvaE8B6IPjEqoZXnEMY3dBYYK0F9I37uCwuUgkTqRhbfRj/m0u6ldo= X-Received: by 2002:a9d:6ada:: with SMTP id m26mr560428otq.192.1600207390980; Tue, 15 Sep 2020 15:03:10 -0700 (PDT) MIME-Version: 1.0 References: <20200821035420.380495-1-robh@kernel.org> <20200915091218.28737-1-michael@walle.cc> In-Reply-To: <20200915091218.28737-1-michael@walle.cc> From: Rob Herring Date: Tue, 15 Sep 2020 16:02:59 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 00/40] PCI: dwc: Driver clean-ups To: Michael Walle Cc: "Gross, Andy" , Bjorn Helgaas , Bjorn Andersson , Dilip Kota , Fabio Estevam , Gustavo Pimentel , Kunihiko Hayashi , Richard Zhu , Jerome Brunet , Jesper Nilsson , Jingoo Han , Jon Hunter , Jonathan Chocron , Sascha Hauer , Kukjin Kim , Kevin Hilman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Lucas Stach , "open list:ARM/Amlogic Meson..." , linux-arm-kernel@axis.com, linux-arm-kernel , linux-arm-msm , NXP Linux Team , linux-omap , PCI , linux-samsung-soc , linux-tegra , Lorenzo Pieralisi , Murali Karicheri , Martin Blumenstingl , Marc Zyngier , Neil Armstrong , Pratyush Anand , Sascha Hauer , Shawn Guo , Shawn Guo , Song Xiaowei , Stanimir Varbanov , Thierry Reding , Wangbinghui , Masahiro Yamada , Yue Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org On Tue, Sep 15, 2020 at 3:12 AM Michael Walle wrote: > > Hi Rob, > > > This is a series of clean-ups for the Designware PCI driver. The series > > initially reworks the config space accessors to use the existing pci_ops > > struct. Then there's removal of various private data that's also present > > in the pci_host_bridge struct. There's also some duplicated common (PCI > > and DWC) register defines which I converted to use the common defines. > > Finally, the initialization for speed/gen, number of lanes, and N_FTS > > are all moved to the common DWC code. > > > This is compile tested only as I don't have any DWC based h/w, so any > > testing would be helpful. A branch is here[1]. > > I've noticed that with the latest linux-next, my board doesn't boot > anymore. I've traced it back to this series. There is a similar > board in kernelci [1,2] where you can have a look at the backtrace. > > I've bisected this to the following patch: > PCI: dwc: Use generic config accessors That's helpful. > I'm pretty much lost here. It seems that the kernel tries to read from > an invalid/unmapped memory address. > > [1] https://kernelci.org/test/plan/id/5f5f4992d1c53777a0a6092d/ > [2] https://storage.kernelci.org/next/master/next-20200914/arm64/defconfig/gcc-8/lab-nxp/baseline-fsl-ls1028a-rdb.txt Thanks for the pointers. I was wondering if kernelci had any boards with DWC. Can you try this? The link up check seemed unnecessary as it is racy. What happens if the link goes down right after checking? That's the only thing in the change that sticks out. diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 317ff512f8df..afee1a0e8883 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -441,6 +441,9 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus, struct pcie_port *pp = bus->sysdata; struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + if (!dw_pcie_link_up(pci)) + return NULL; + busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | PCIE_ATU_FUNC(PCI_FUNC(devfn));