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From: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
To: David Lechner <david@lechnology.com>, Marc Zyngier <maz@kernel.org>
Cc: tglx@linutronix.de, jason@lakedaemon.net, "Anna,
	Suman" <s-anna@ti.com>,
	robh+dt@kernel.org, Lee Jones <lee.jones@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	"Mills, William" <wmills@ti.com>,
	"Bajjuri, Praneeth" <praneeth@ti.com>
Subject: Re: [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs
Date: Fri, 31 Jul 2020 14:32:01 +0200
Message-ID: <CAMxfBF6UrB7ppTrKpsCiczQv2Xyk9_Up3tF9eDGT6+DmKegQ_w@mail.gmail.com> (raw)
In-Reply-To: <015909fa-794c-c938-d944-897985475d20@lechnology.com>

On Wed, 29 Jul 2020 at 21:28, David Lechner <david@lechnology.com> wrote:
>
> On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
> > From: Suman Anna <s-anna@ti.com>
> >
> > The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP,
> > commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
> > more System Events (160 vs 64), more Interrupt Channels and Host Interrupts
> > (20 vs 10) compared to the previous generation PRUSS INTC instances. The
> > first 2 and the last 10 of these host interrupt lines are used by the
> > PRU and other auxiliary cores and sub-modules within the ICSSG, with 8
> > host interrupts connected to MPU. The host interrupts 5, 6, 7 are also
> > connected to the other ICSSG instances within the SoC and can be
> > partitioned as per system integration through the board dts files.
> >
> > Enhance the PRUSS INTC driver to add support for this ICSSG INTC
> > instance.
> >
> > Signed-off-by: Suman Anna <s-anna@ti.com>
> > Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> > ---
>
> There is not much left in this patch. Might as well squash this into
> "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts".

This is what was suggested in v3. IMO even for commit log it is worth
keeping it as a separate patch but if Marc wants to see it squashed,
no problem I will do that.

Best regards,
Grzegorz

      reply index

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-28  9:18 [PATCH v4 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-07-29 17:34   ` David Lechner
2020-07-31 11:48     ` Grzegorz Jaszczyk
2020-07-31 14:09       ` David Lechner
2020-07-31 14:16         ` Grzegorz Jaszczyk
2020-07-31 14:35           ` Suman Anna
2020-07-31 21:09       ` Rob Herring
2020-08-02 21:49         ` Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-07-29 18:43   ` David Lechner
2020-07-31 11:57     ` Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Grzegorz Jaszczyk
2020-07-28 16:37   ` Marc Zyngier
2020-07-28 22:23     ` Grzegorz Jaszczyk
2020-07-29 18:48   ` David Lechner
2020-07-31 14:11     ` Grzegorz Jaszczyk
2020-07-28  9:18 ` [PATCH v4 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-29 19:23   ` David Lechner
2020-07-31 12:28     ` Grzegorz Jaszczyk
2020-07-31 15:59       ` David Lechner
2020-07-28  9:18 ` [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-07-29 19:28   ` David Lechner
2020-07-31 12:32     ` Grzegorz Jaszczyk [this message]

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