Re: [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs

[Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>]

On Wed, 29 Jul 2020 at 21:28, David Lechner <david@lechnology.com> wrote:
>
> On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
> > From: Suman Anna <s-anna@ti.com>
> >
> > The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP,
> > commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
> > more System Events (160 vs 64), more Interrupt Channels and Host Interrupts
> > (20 vs 10) compared to the previous generation PRUSS INTC instances. The
> > first 2 and the last 10 of these host interrupt lines are used by the
> > PRU and other auxiliary cores and sub-modules within the ICSSG, with 8
> > host interrupts connected to MPU. The host interrupts 5, 6, 7 are also
> > connected to the other ICSSG instances within the SoC and can be
> > partitioned as per system integration through the board dts files.
> >
> > Enhance the PRUSS INTC driver to add support for this ICSSG INTC
> > instance.
> >
> > Signed-off-by: Suman Anna <s-anna@ti.com>
> > Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
> > ---
>
> There is not much left in this patch. Might as well squash this into
> "irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts".

This is what was suggested in v3. IMO even for commit log it is worth
keeping it as a separate patch but if Marc wants to see it squashed,
no problem I will do that.

Best regards,
Grzegorz