From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7503C19437 for ; Tue, 8 Dec 2020 15:43:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B7AFF23AA9 for ; Tue, 8 Dec 2020 15:43:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730180AbgLHPmy (ORCPT ); Tue, 8 Dec 2020 10:42:54 -0500 Received: from perceval.ideasonboard.com ([213.167.242.64]:54454 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730167AbgLHPmy (ORCPT ); Tue, 8 Dec 2020 10:42:54 -0500 Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C87CFDD; Tue, 8 Dec 2020 16:42:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1607442133; bh=41IRw5dax42zDIhwooYf8UOz+N5DNrVW4XK4GxMZH+s=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=IteqodYsZr1LUQbD1mKmIX9elzNtB7Iitaeh718oqsw+eiq1qhz9NLCbb2NBOJR7c sF40mRBqa7brGyDPKW3fm3n7ajecAmLxRnoMaL7wdqOaCc/yMgxq3aZkq9l8uXA2cg RcPdWLZfMjr7BQpBi7RU0jOX7td38wGut5w42Do0= Date: Tue, 8 Dec 2020 17:42:09 +0200 From: Laurent Pinchart To: Tomi Valkeinen Cc: Sebastian Reichel , Nikhil Devshatwar , dri-devel@lists.freedesktop.org, linux-omap@vger.kernel.org, Sekhar Nori , Tony Lindgren , hns@goldelico.com, Sam Ravnborg Subject: Re: [PATCH v5 14/29] drm/omap: dsi: enable HS before sending the frame Message-ID: References: <20201208122855.254819-1-tomi.valkeinen@ti.com> <20201208122855.254819-15-tomi.valkeinen@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201208122855.254819-15-tomi.valkeinen@ti.com> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi Tomi, Thank you for the patch. On Tue, Dec 08, 2020 at 02:28:40PM +0200, Tomi Valkeinen wrote: > We currently use a single VC for sending commands and pixel data. The > LP/HS mode for pixel data is correctly set to HS by accident, as we have > set the VC to HS already earlier. > > However, if we use a different VC for video data, the VC is in LP mode. > Fix this by always enabling HS mode before starting a frame update. > > Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart > --- > drivers/gpu/drm/omapdrm/dss/dsi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c > index 544f5f1eed91..9d210a020916 100644 > --- a/drivers/gpu/drm/omapdrm/dss/dsi.c > +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c > @@ -3918,6 +3918,8 @@ static int dsi_update_channel(struct omap_dss_device *dssdev, int vc) > > dsi_set_ulps_auto(dsi, false); > > + dsi_vc_enable_hs(dssdev, vc, true); > + > /* > * Send NOP between the frames. If we don't send something here, the > * updates stop working. This is probably related to DSI spec stating -- Regards, Laurent Pinchart