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* [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd
@ 2021-01-26 12:39 Tony Lindgren
  2021-01-26 12:39 ` [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver Tony Lindgren
                   ` (15 more replies)
  0 siblings, 16 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

Hi all,

Here's v2 series to update dra7 to probe with ti-sysc and genpd like we've
already done for am3 and 4.

These patches are against v5.11-rc1, and depend on the following commits
in my fixes branch:

7078a5ba7a58 ("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1")
2a39af3870e9 ("ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus")

These patches also depend on the series:

[PATCH 0/3] Few ti-sysc changes for v5.12 merge window

Please review and test, I've also pushed out a temporary testing branch to
make testing easier to [0][1].

Regards,

Tony

Changes since v1:

- Split the series into two parts, looks like most of the emails did not
  make it to the lists

- Dropped Balaji from Cc as the email address bounces

[0] git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git tmp-testing-genpd-dra7
[1] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v5.12/tmp-testing-genpd-dra7

Tony Lindgren (15):
  PCI: pci-dra7xx: Prepare for deferred probe with
    module_platform_driver
  ARM: dts: Update pcie ranges for dra7
  ARM: dts: Configure interconnect target module for dra7 pcie
  ARM: dts: Properly configure dra7 edma sysconfig registers
  ARM: dts: Move dra7 l3 noc to a separate node
  ARM: dts: Configure interconnect target module for dra7 qspi
  ARM: dts: Configure interconnect target module for dra7 sata
  ARM: dts: Configure interconnect target module for dra7 mpu
  ARM: dts: Configure interconnect target module for dra7 dmm
  ARM: dts: Configure simple-pm-bus for dra7 l4_wkup
  ARM: dts: Configure simple-pm-bus for dra7 l4_per1
  ARM: dts: Configure simple-pm-bus for dra7 l4_per2
  ARM: dts: Configure simple-pm-bus for dra7 l4_per3
  ARM: dts: Configure simple-pm-bus for dra7 l4_cfg
  ARM: dts: Configure simple-pm-bus for dra7 l3

 arch/arm/boot/dts/dra7-l4.dtsi          |  76 ++++++---
 arch/arm/boot/dts/dra7.dtsi             | 216 ++++++++++++++++--------
 drivers/pci/controller/dwc/pci-dra7xx.c |  13 +-
 3 files changed, 213 insertions(+), 92 deletions(-)

-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-28  8:54   ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 02/15] ARM: dts: Update pcie ranges for dra7 Tony Lindgren
                   ` (14 subsequent siblings)
  15 siblings, 1 reply; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, linux-pci, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra

After updating pci-dra7xx driver to probe with ti-sysc and genpd, I
noticed that dra7xx_pcie_probe() would not run if a power-domains property
was configured for the interconnect target module.

Turns out that module_platform_driver_probe uses platform_driver_probe(),
while module_platform_driver_probe uses platform_driver_register().

Only platform_driver_register() works for deferred probe as noted in the
comments for __platform_driver_probe() in drivers/base/platform.c with a
line saying "Note that this is incompatible with deferred probing".

With module_platform_driver_probe, we have platform_driver_probe() produce
-ENODEV error at device_initcall() level, and no further attempts are done.
Let's fix this by using module_platform_driver instead.

Note this is not an issue currently as we probe devices with simple-bus,
and only is needed as we start probing the device with ti-sysc, or when
probed with simple-pm-bus.

Note that we must now also remove __init for probe related functions to
avoid a section mismatch warning.

Cc: linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

Can you guys please review test and ack if this looks OK? I'd like to
apply this together with the series to drop dra7 platform data as it's
not needed earlier.

---
 drivers/pci/controller/dwc/pci-dra7xx.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -443,8 +443,8 @@ static const struct dw_pcie_ep_ops pcie_ep_ops = {
 	.get_features = dra7xx_pcie_get_features,
 };
 
-static int __init dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx,
-				     struct platform_device *pdev)
+static int dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx,
+			      struct platform_device *pdev)
 {
 	int ret;
 	struct dw_pcie_ep *ep;
@@ -472,8 +472,8 @@ static int __init dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx,
 	return 0;
 }
 
-static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx,
-				       struct platform_device *pdev)
+static int dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx,
+				struct platform_device *pdev)
 {
 	int ret;
 	struct dw_pcie *pci = dra7xx->pci;
@@ -682,7 +682,7 @@ static int dra7xx_pcie_configure_two_lane(struct device *dev,
 	return 0;
 }
 
-static int __init dra7xx_pcie_probe(struct platform_device *pdev)
+static int dra7xx_pcie_probe(struct platform_device *pdev)
 {
 	u32 reg;
 	int ret;
@@ -938,6 +938,7 @@ static const struct dev_pm_ops dra7xx_pcie_pm_ops = {
 };
 
 static struct platform_driver dra7xx_pcie_driver = {
+	.probe = dra7xx_pcie_probe,
 	.driver = {
 		.name	= "dra7-pcie",
 		.of_match_table = of_dra7xx_pcie_match,
@@ -946,4 +947,4 @@ static struct platform_driver dra7xx_pcie_driver = {
 	},
 	.shutdown = dra7xx_pcie_shutdown,
 };
-builtin_platform_driver_probe(dra7xx_pcie_driver, dra7xx_pcie_probe);
+builtin_platform_driver(dra7xx_pcie_driver);
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 02/15] ARM: dts: Update pcie ranges for dra7
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
  2021-01-26 12:39 ` [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 03/15] ARM: dts: Configure interconnect target module for dra7 pcie Tony Lindgren
                   ` (13 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Kishon Vijay Abraham I,
	Bjorn Helgaas, Lorenzo Pieralisi, Vignesh Raghavendra, linux-pci

In order to update pcie to probe with ti-sysc and genpd, let's update the
pcie ranges to not use address 0 for 0x20000000 and 0x30000000. The range
for 0 is typically used for child devices as the offset from the module
base. In the following patches, we will update pcie to probe with ti-sysc,
and the patches become a bit confusing to read compared to other similar
modules unless we update the ranges first. So let's just use the full
addresses for ranges for the 0x20000000 and 0x30000000 ranges.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -170,22 +170,24 @@ axi@0 {
 			compatible = "simple-bus";
 			#size-cells = <1>;
 			#address-cells = <1>;
-			ranges = <0x51000000 0x51000000 0x3000
-				  0x0	     0x20000000 0x10000000>;
+			ranges = <0x51000000 0x51000000 0x3000>,
+				 <0x20000000 0x20000000 0x10000000>;
 			dma-ranges;
 			/**
 			 * To enable PCI endpoint mode, disable the pcie1_rc
 			 * node and enable pcie1_ep mode.
 			 */
 			pcie1_rc: pcie@51000000 {
-				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
+				reg = <0x51000000 0x2000>,
+				      <0x51002000 0x14c>,
+				      <0x20001000 0x2000>;
 				reg-names = "rc_dbics", "ti_conf", "config";
 				interrupts = <0 232 0x4>, <0 233 0x4>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				device_type = "pci";
-				ranges = <0x81000000 0 0          0x03000 0 0x00010000
-					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
+				ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
+					 <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
 				bus-range = <0x00 0xff>;
 				#interrupt-cells = <1>;
 				num-lanes = <1>;
@@ -209,7 +211,10 @@ pcie1_intc: interrupt-controller {
 			};
 
 			pcie1_ep: pcie_ep@51000000 {
-				reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
+				reg = <0x51000000 0x28>,
+				      <0x51002000 0x14c>,
+				      <0x51001000 0x28>,
+				      <0x20001000 0x10000000>;
 				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
 				interrupts = <0 232 0x4>;
 				num-lanes = <1>;
@@ -228,19 +233,21 @@ axi@1 {
 			compatible = "simple-bus";
 			#size-cells = <1>;
 			#address-cells = <1>;
-			ranges = <0x51800000 0x51800000 0x3000
-				  0x0	     0x30000000 0x10000000>;
+			ranges = <0x51800000 0x51800000 0x3000>,
+				 <0x30000000 0x30000000 0x10000000>;
 			dma-ranges;
 			status = "disabled";
 			pcie2_rc: pcie@51800000 {
-				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
+				reg = <0x51800000 0x2000>,
+				      <0x51802000 0x14c>,
+				      <0x30001000 0x2000>;
 				reg-names = "rc_dbics", "ti_conf", "config";
 				interrupts = <0 355 0x4>, <0 356 0x4>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				device_type = "pci";
-				ranges = <0x81000000 0 0          0x03000 0 0x00010000
-					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;
+				ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
+					 <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
 				bus-range = <0x00 0xff>;
 				#interrupt-cells = <1>;
 				num-lanes = <1>;
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 03/15] ARM: dts: Configure interconnect target module for dra7 pcie
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
  2021-01-26 12:39 ` [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver Tony Lindgren
  2021-01-26 12:39 ` [PATCH 02/15] ARM: dts: Update pcie ranges for dra7 Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 04/15] ARM: dts: Properly configure dra7 edma sysconfig registers Tony Lindgren
                   ` (12 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Kishon Vijay Abraham I,
	Bjorn Helgaas, Lorenzo Pieralisi, Vignesh Raghavendra, linux-pci

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 34 ++++++++++++++++++++++++++++++----
 1 file changed, 30 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -166,8 +166,21 @@ l4_per2: interconnect@48400000 {
 		l4_per3: interconnect@48800000 {
 		};
 
-		axi@0 {
-			compatible = "simple-bus";
+		/*
+		 * Register access seems to have complex dependencies and also
+		 * seems to need an enabled phy. See the TRM chapter for "Table
+		 * 26-678. Main Sequence PCIe Controller Global Initialization"
+		 * and also dra7xx_pcie_probe().
+		 */
+		axi0: target-module@51000000 {
+			compatible = "ti,sysc-omap4", "ti,sysc";
+			power-domains = <&prm_l3init>;
+			resets = <&prm_l3init 0>;
+			reset-names = "rstctrl";
+			clocks = <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 0>,
+				 <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 9>,
+				 <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 10>;
+			clock-names = "fck", "phy-clk", "phy-clk-div";
 			#size-cells = <1>;
 			#address-cells = <1>;
 			ranges = <0x51000000 0x51000000 0x3000>,
@@ -229,8 +242,21 @@ pcie1_ep: pcie_ep@51000000 {
 			};
 		};
 
-		axi@1 {
-			compatible = "simple-bus";
+		/*
+		 * Register access seems to have complex dependencies and also
+		 * seems to need an enabled phy. See the TRM chapter for "Table
+		 * 26-678. Main Sequence PCIe Controller Global Initialization"
+		 * and also dra7xx_pcie_probe().
+		 */
+		axi1: target-module@51800000 {
+			compatible = "ti,sysc-omap4", "ti,sysc";
+			clocks = <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 0>,
+				 <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 9>,
+				 <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 10>;
+			clock-names = "fck", "phy-clk", "phy-clk-div";
+			power-domains = <&prm_l3init>;
+			resets = <&prm_l3init 1>;
+			reset-names = "rstctrl";
 			#size-cells = <1>;
 			#address-cells = <1>;
 			ranges = <0x51800000 0x51800000 0x3000>,
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 04/15] ARM: dts: Properly configure dra7 edma sysconfig registers
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (2 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 03/15] ARM: dts: Configure interconnect target module for dra7 pcie Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 05/15] ARM: dts: Move dra7 l3 noc to a separate node Tony Lindgren
                   ` (11 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

Looks like the TRM is not listing the sysconfig for edma, let's add it
based on am437x TRM edma registers as listed in sections "Table 10-26.
EDMA3CC Registers" and "Table 10-99. EDMA3TC Registers".

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -369,8 +369,15 @@ dra7_iodelay_core: padconf@4844a000 {
 
 		target-module@43300000 {
 			compatible = "ti,sysc-omap4", "ti,sysc";
-			reg = <0x43300000 0x4>;
-			reg-names = "rev";
+			reg = <0x43300000 0x4>,
+			      <0x43300010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
 			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPCC_CLKCTRL 0>;
 			clock-names = "fck";
 			#address-cells = <1>;
@@ -402,8 +409,15 @@ edma: dma@0 {
 
 		target-module@43400000 {
 			compatible = "ti,sysc-omap4", "ti,sysc";
-			reg = <0x43400000 0x4>;
-			reg-names = "rev";
+			reg = <0x43400000 0x4>,
+			      <0x43400010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
 			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPTC0_CLKCTRL 0>;
 			clock-names = "fck";
 			#address-cells = <1>;
@@ -420,8 +434,15 @@ edma_tptc0: dma@0 {
 
 		target-module@43500000 {
 			compatible = "ti,sysc-omap4", "ti,sysc";
-			reg = <0x43500000 0x4>;
-			reg-names = "rev";
+			reg = <0x43500000 0x4>,
+			      <0x43500010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
 			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPTC1_CLKCTRL 0>;
 			clock-names = "fck";
 			#address-cells = <1>;
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 05/15] ARM: dts: Move dra7 l3 noc to a separate node
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (3 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 04/15] ARM: dts: Properly configure dra7 edma sysconfig registers Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 06/15] ARM: dts: Configure interconnect target module for dra7 qspi Tony Lindgren
                   ` (10 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

In order to prepare for probing l3 with genpd, we need to move l3 noc
into a separate node for l3 interconnect to have it's own regs, and
to avoid it claiming more than it needs for the io regions.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -144,16 +144,20 @@ mpu {
 	 * hierarchy.
 	 */
 	ocp: ocp {
-		compatible = "ti,dra7-l3-noc", "simple-bus";
+		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x0 0xc0000000>;
 		dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 		ti,hwmods = "l3_main_1", "l3_main_2";
-		reg = <0x0 0x44000000 0x0 0x1000000>,
-		      <0x0 0x45000000 0x0 0x1000>;
-		interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-				      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+
+		l3-noc@44000000 {
+			compatible = "ti,dra7-l3-noc";
+			reg = <0x44000000 0x1000>,
+			      <0x45000000 0x1000>;
+			interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+					      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		};
 
 		l4_cfg: interconnect@4a000000 {
 		};
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 06/15] ARM: dts: Configure interconnect target module for dra7 qspi
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (4 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 05/15] ARM: dts: Move dra7 l3 noc to a separate node Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 07/15] ARM: dts: Configure interconnect target module for dra7 sata Tony Lindgren
                   ` (9 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Vignesh Raghavendra,
	Bjorn Helgaas, Kishon Vijay Abraham I, Lorenzo Pieralisi,
	linux-pci

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 41 ++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -752,20 +752,37 @@ abb_gpu: regulator-abb-gpu {
 			>;
 		};
 
-		qspi: spi@4b300000 {
-			compatible = "ti,dra7xxx-qspi";
-			reg = <0x4b300000 0x100>,
-			      <0x5c000000 0x4000000>;
-			reg-names = "qspi_base", "qspi_mmap";
-			syscon-chipselects = <&scm_conf 0x558>;
-			#address-cells = <1>;
-			#size-cells = <0>;
+		target-module@4b300000 {
+			compatible = "ti,sysc-omap4", "ti,sysc";
 			ti,hwmods = "qspi";
-			clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>;
+			reg = <0x4b300000 0x4>,
+			      <0x4b300010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 0>;
 			clock-names = "fck";
-			num-cs = <4>;
-			interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x4b300000 0x1000>,
+				 <0x5c000000 0x5c000000 0x4000000>;
+
+			qspi: spi@0 {
+				compatible = "ti,dra7xxx-qspi";
+				reg = <0 0x100>,
+				      <0x5c000000 0x4000000>;
+				reg-names = "qspi_base", "qspi_mmap";
+				syscon-chipselects = <&scm_conf 0x558>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>;
+				clock-names = "fck";
+				num-cs = <4>;
+				interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
 		};
 
 		/* OCP2SCP3 */
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 07/15] ARM: dts: Configure interconnect target module for dra7 sata
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (5 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 06/15] ARM: dts: Configure interconnect target module for dra7 qspi Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu Tony Lindgren
                   ` (8 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 29 ++++++++++++++++++++++++++---
 arch/arm/boot/dts/dra7.dtsi    | 12 ------------
 2 files changed, 26 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -572,11 +572,34 @@ target-module@8000 {			/* 0x4a108000, ap 29 1e.0 */
 		};
 
 		target-module@40000 {			/* 0x4a140000, ap 31 06.0 */
-			compatible = "ti,sysc";
-			status = "disabled";
-			#address-cells = <1>;
+			compatible = "ti,sysc-omap4", "ti,sysc";
+			ti,hwmods = "sata";
+			reg = <0x400fc 4>,
+			      <0x41100 4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>,
+					<SYSC_IDLE_SMART_WKUP>;
+			power-domains = <&prm_l3init>;
+			clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 0>;
+			clock-names = "fck";
 			#size-cells = <1>;
+			#address-cells = <1>;
 			ranges = <0x0 0x40000 0x10000>;
+
+			sata: sata@0 {
+				compatible = "snps,dwc-ahci";
+				reg = <0 0x1100>, <0x1100 0x8>;
+				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&sata_phy>;
+				phy-names = "sata-phy";
+				clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
+				ports-implemented = <0x1>;
+			};
 		};
 
 		target-module@51000 {			/* 0x4a151000, ap 33 50.0 */
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -785,18 +785,6 @@ qspi: spi@0 {
 			};
 		};
 
-		/* OCP2SCP3 */
-		sata: sata@4a141100 {
-			compatible = "snps,dwc-ahci";
-			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
-			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-			phys = <&sata_phy>;
-			phy-names = "sata-phy";
-			clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
-			ti,hwmods = "sata";
-			ports-implemented = <0x1>;
-		};
-
 		/* OCP2SCP1 */
 		/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
 
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (6 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 07/15] ARM: dts: Configure interconnect target module for dra7 sata Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-03-08 11:53   ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm Tony Lindgren
                   ` (7 subsequent siblings)
  15 siblings, 1 reply; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -124,18 +124,6 @@ opp_high@1500000000 {
 		};
 	};
 
-	/*
-	 * The soc node represents the soc top level view. It is used for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap5-mpu";
-			ti,hwmods = "mpu";
-		};
-	};
-
 	/*
 	 * XXX: Use a flat representation of the SOC interconnect.
 	 * The real OMAP interconnect network is quite complex.
@@ -165,6 +153,22 @@ l4_wkup: interconnect@4ae00000 {
 		};
 		l4_per1: interconnect@48000000 {
 		};
+
+		target-module@48210000 {
+			compatible = "ti,sysc-omap4-simple", "ti,sysc";
+			ti,hwmods = "mpu";
+			power-domains = <&prm_mpu>;
+			clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x1f0000>;
+
+			mpu {
+				compatible = "ti,omap5-mpu";
+			};
+		};
+
 		l4_per2: interconnect@48400000 {
 		};
 		l4_per3: interconnect@48800000 {
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (7 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-03-08 12:51   ` Tony Lindgren
  2021-01-26 12:39 ` [PATCH 10/15] ARM: dts: Configure simple-pm-bus for dra7 l4_wkup Tony Lindgren
                   ` (6 subsequent siblings)
  15 siblings, 1 reply; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -465,11 +465,24 @@ edma_tptc1: dma@0 {
 			};
 		};
 
-		dmm@4e000000 {
-			compatible = "ti,omap5-dmm";
-			reg = <0x4e000000 0x800>;
-			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+		target-module@4e000000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
 			ti,hwmods = "dmm";
+			reg = <0x4e000000 0x4>,
+			      <0x4e000010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ranges = <0x0 0x4e000000 0x2000000>;
+			#size-cells = <1>;
+			#address-cells = <1>;
+
+			dmm@0 {
+				compatible = "ti,omap5-dmm";
+				reg = <0x4e000000 0x800>;
+				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		ipu1: ipu@58820000 {
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 10/15] ARM: dts: Configure simple-pm-bus for dra7 l4_wkup
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (8 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm Tony Lindgren
@ 2021-01-26 12:39 ` Tony Lindgren
  2021-01-26 12:40 ` [PATCH 11/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per1 Tony Lindgren
                   ` (5 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:39 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -4228,7 +4228,10 @@ vpe: vpe@0 {
 };
 
 &l4_wkup {						/* 0x4ae00000 */
-	compatible = "ti,dra7-l4-wkup", "simple-bus";
+	compatible = "ti,dra7-l4-wkup", "simple-pm-bus";
+	power-domains = <&prm_wkupaon>;
+	clocks = <&wkupaon_clkctrl DRA7_WKUPAON_L4_WKUP_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x4ae00000 0x800>,
 	      <0x4ae00800 0x800>,
 	      <0x4ae01000 0x1000>;
@@ -4241,7 +4244,7 @@ &l4_wkup {						/* 0x4ae00000 */
 		 <0x00030000 0x4ae30000 0x010000>;	/* segment 3 */
 
 	segment@0 {					/* 0x4ae00000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -4318,7 +4321,7 @@ scm_wkup: scm_conf@0 {
 	};
 
 	segment@10000 {					/* 0x4ae10000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00010000 0x001000>,	/* ap 5 */
@@ -4428,7 +4431,7 @@ target-module@c000 {			/* 0x4ae1c000, ap 11 38.0 */
 	};
 
 	segment@20000 {					/* 0x4ae20000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00006000 0x00026000 0x001000>,	/* ap 13 */
@@ -4534,7 +4537,7 @@ target-module@f000 {			/* 0x4ae2f000, ap 32 58.0 */
 	};
 
 	segment@30000 {					/* 0x4ae30000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0000c000 0x0003c000 0x002000>,	/* ap 30 */
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 11/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per1
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (9 preceding siblings ...)
  2021-01-26 12:39 ` [PATCH 10/15] ARM: dts: Configure simple-pm-bus for dra7 l4_wkup Tony Lindgren
@ 2021-01-26 12:40 ` Tony Lindgren
  2021-01-26 12:40 ` [PATCH 12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2 Tony Lindgren
                   ` (4 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:40 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -1029,7 +1029,10 @@ target-module@36000 {			/* 0x4a236000, ap 119 62.0 */
 };
 
 &l4_per1 {						/* 0x48000000 */
-	compatible = "ti,dra7-l4-per1", "simple-bus";
+	compatible = "ti,dra7-l4-per1", "simple-pm-bus";
+	power-domains = <&prm_l4per>;
+	clocks = <&l4per_clkctrl DRA7_L4PER_L4_PER1_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x48000000 0x800>,
 	      <0x48000800 0x800>,
 	      <0x48001000 0x400>,
@@ -1043,7 +1046,7 @@ &l4_per1 {						/* 0x48000000 */
 		 <0x00200000 0x48200000 0x200000>;	/* segment 1 */
 
 	segment@0 {					/* 0x48000000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -2292,7 +2295,7 @@ target-module@d5000 {			/* 0x480d5000, ap 73 30.0 */
 	};
 
 	segment@200000 {					/* 0x48200000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 	};
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (10 preceding siblings ...)
  2021-01-26 12:40 ` [PATCH 11/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per1 Tony Lindgren
@ 2021-01-26 12:40 ` Tony Lindgren
  2021-01-26 12:40 ` [PATCH 13/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per3 Tony Lindgren
                   ` (3 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:40 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -2302,7 +2302,10 @@ segment@200000 {					/* 0x48200000 */
 };
 
 &l4_per2 {						/* 0x48400000 */
-	compatible = "ti,dra7-l4-per2", "simple-bus";
+	compatible = "ti,dra7-l4-per2", "simple-pm-bus";
+	power-domains = <&prm_l4per>;
+	clocks = <&l4per2_clkctrl DRA7_L4PER2_L4_PER2_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x48400000 0x800>,
 	      <0x48400800 0x800>,
 	      <0x48401000 0x400>,
@@ -2322,7 +2325,7 @@ &l4_per2 {						/* 0x48400000 */
 		 <0x48454000 0x48454000 0x400000>;	/* L3 data port */
 
 	segment@0 {					/* 0x48400000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 13/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per3
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (11 preceding siblings ...)
  2021-01-26 12:40 ` [PATCH 12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2 Tony Lindgren
@ 2021-01-26 12:40 ` Tony Lindgren
  2021-01-26 12:40 ` [PATCH 14/15] ARM: dts: Configure simple-pm-bus for dra7 l4_cfg Tony Lindgren
                   ` (2 subsequent siblings)
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:40 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -3123,7 +3123,10 @@ cpts {
 };
 
 &l4_per3 {						/* 0x48800000 */
-	compatible = "ti,dra7-l4-per3", "simple-bus";
+	compatible = "ti,dra7-l4-per3", "simple-pm-bus";
+	power-domains = <&prm_l4per>;
+	clocks = <&l4per3_clkctrl DRA7_L4PER3_L4_PER3_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x48800000 0x800>,
 	      <0x48800800 0x800>,
 	      <0x48801000 0x400>,
@@ -3135,7 +3138,7 @@ &l4_per3 {						/* 0x48800000 */
 	ranges = <0x00000000 0x48800000 0x200000>;	/* segment 0 */
 
 	segment@0 {					/* 0x48800000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 14/15] ARM: dts: Configure simple-pm-bus for dra7 l4_cfg
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (12 preceding siblings ...)
  2021-01-26 12:40 ` [PATCH 13/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per3 Tony Lindgren
@ 2021-01-26 12:40 ` Tony Lindgren
  2021-01-26 12:40 ` [PATCH 15/15] ARM: dts: Configure simple-pm-bus for dra7 l3 Tony Lindgren
  2021-03-08 11:20 ` [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Kishon Vijay Abraham I
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:40 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -1,5 +1,8 @@
 &l4_cfg {						/* 0x4a000000 */
-	compatible = "ti,dra7-l4-cfg", "simple-bus";
+	compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
+	power-domains = <&prm_coreaon>;
+	clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
+	clock-names = "fck";
 	reg = <0x4a000000 0x800>,
 	      <0x4a000800 0x800>,
 	      <0x4a001000 0x1000>;
@@ -11,7 +14,7 @@ &l4_cfg {						/* 0x4a000000 */
 		 <0x00200000 0x4a200000 0x100000>;	/* segment 2 */
 
 	segment@0 {					/* 0x4a000000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -493,7 +496,7 @@ hwspinlock: spinlock@0 {
 	};
 
 	segment@100000 {					/* 0x4a100000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00002000 0x00102000 0x001000>,	/* ap 27 */
@@ -812,7 +815,7 @@ target-module@87000 {			/* 0x4a187000, ap 75 74.0 */
 	};
 
 	segment@200000 {					/* 0x4a200000 */
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x00018000 0x00218000 0x001000>,	/* ap 43 */
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH 15/15] ARM: dts: Configure simple-pm-bus for dra7 l3
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (13 preceding siblings ...)
  2021-01-26 12:40 ` [PATCH 14/15] ARM: dts: Configure simple-pm-bus for dra7 l4_cfg Tony Lindgren
@ 2021-01-26 12:40 ` Tony Lindgren
  2021-03-08 11:20 ` [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Kishon Vijay Abraham I
  15 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-26 12:40 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -132,12 +132,14 @@ opp_high@1500000000 {
 	 * hierarchy.
 	 */
 	ocp: ocp {
-		compatible = "simple-bus";
+		compatible = "simple-pm-bus";
+		power-domains = <&prm_core>;
+		clocks = <&l3main1_clkctrl DRA7_L3MAIN1_L3_MAIN_1_CLKCTRL 0>,
+			 <&l3instr_clkctrl DRA7_L3INSTR_L3_MAIN_2_CLKCTRL 0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x0 0xc0000000>;
 		dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>;
-		ti,hwmods = "l3_main_1", "l3_main_2";
 
 		l3-noc@44000000 {
 			compatible = "ti,dra7-l3-noc";
-- 
2.30.0

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
  2021-01-26 12:39 ` [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver Tony Lindgren
@ 2021-01-28  8:54   ` Tony Lindgren
  0 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-01-28  8:54 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, linux-pci, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra

Hi,

* Tony Lindgren <tony@atomide.com> [210126 12:41]:
> After updating pci-dra7xx driver to probe with ti-sysc and genpd, I
> noticed that dra7xx_pcie_probe() would not run if a power-domains property
> was configured for the interconnect target module.
> 
> Turns out that module_platform_driver_probe uses platform_driver_probe(),
> while module_platform_driver_probe uses platform_driver_register().

I just noticed that the above is confusing with module_platform_driver_probe
mentioned twice. It should be:

Turns out that module_platform_driver_probe uses platform_driver_probe(),
while builtin_platform_driver uses platform_driver_register().

Regards,

Tony

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd
  2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
                   ` (14 preceding siblings ...)
  2021-01-26 12:40 ` [PATCH 15/15] ARM: dts: Configure simple-pm-bus for dra7 l3 Tony Lindgren
@ 2021-03-08 11:20 ` Kishon Vijay Abraham I
  15 siblings, 0 replies; 20+ messages in thread
From: Kishon Vijay Abraham I @ 2021-03-08 11:20 UTC (permalink / raw)
  To: Tony Lindgren, linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Lorenzo Pieralisi, Vignesh Raghavendra, linux-pci



On 26/01/21 6:09 pm, Tony Lindgren wrote:
> Hi all,
> 
> Here's v2 series to update dra7 to probe with ti-sysc and genpd like we've
> already done for am3 and 4.
> 
> These patches are against v5.11-rc1, and depend on the following commits
> in my fixes branch:
> 
> 7078a5ba7a58 ("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1")
> 2a39af3870e9 ("ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus")
> 
> These patches also depend on the series:
> 
> [PATCH 0/3] Few ti-sysc changes for v5.12 merge window
> 
> Please review and test, I've also pushed out a temporary testing branch to
> make testing easier to [0][1].

Looks good to me and didn't observe any issues in my testing.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
> 
> Regards,
> 
> Tony
> 
> Changes since v1:
> 
> - Split the series into two parts, looks like most of the emails did not
>   make it to the lists
> 
> - Dropped Balaji from Cc as the email address bounces
> 
> [0] git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git tmp-testing-genpd-dra7
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v5.12/tmp-testing-genpd-dra7
> 
> Tony Lindgren (15):
>   PCI: pci-dra7xx: Prepare for deferred probe with
>     module_platform_driver
>   ARM: dts: Update pcie ranges for dra7
>   ARM: dts: Configure interconnect target module for dra7 pcie
>   ARM: dts: Properly configure dra7 edma sysconfig registers
>   ARM: dts: Move dra7 l3 noc to a separate node
>   ARM: dts: Configure interconnect target module for dra7 qspi
>   ARM: dts: Configure interconnect target module for dra7 sata
>   ARM: dts: Configure interconnect target module for dra7 mpu
>   ARM: dts: Configure interconnect target module for dra7 dmm
>   ARM: dts: Configure simple-pm-bus for dra7 l4_wkup
>   ARM: dts: Configure simple-pm-bus for dra7 l4_per1
>   ARM: dts: Configure simple-pm-bus for dra7 l4_per2
>   ARM: dts: Configure simple-pm-bus for dra7 l4_per3
>   ARM: dts: Configure simple-pm-bus for dra7 l4_cfg
>   ARM: dts: Configure simple-pm-bus for dra7 l3
> 
>  arch/arm/boot/dts/dra7-l4.dtsi          |  76 ++++++---
>  arch/arm/boot/dts/dra7.dtsi             | 216 ++++++++++++++++--------
>  drivers/pci/controller/dwc/pci-dra7xx.c |  13 +-
>  3 files changed, 213 insertions(+), 92 deletions(-)
> 

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu
  2021-01-26 12:39 ` [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu Tony Lindgren
@ 2021-03-08 11:53   ` Tony Lindgren
  0 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-03-08 11:53 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

* Tony Lindgren <tony@atomide.com> [210126 12:43]:
> We can now probe devices with device tree only configuration using
> ti-sysc interconnect target module driver. Let's configure the
> module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
> time warnings. The legacy property will be removed in later patches
> together with the legacy platform data.
...

> +		target-module@48210000 {
> +			compatible = "ti,sysc-omap4-simple", "ti,sysc";
> +			ti,hwmods = "mpu";
> +			power-domains = <&prm_mpu>;
> +			clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;
> +			clock-names = "fck";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x1f0000>;
> +
> +			mpu {
> +				compatible = "ti,omap5-mpu";
> +			};
> +		};

I noticed the ranges property above is wrong, it should not be 0.
That range is currently unused thoug. Updated patch below.

Regards,

Tony

8< ----------------------
From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 8 Mar 2021 10:47:59 +0200
Subject: [PATCH] ARM: dts: Configure interconnect target module for dra7
 mpu

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -124,18 +124,6 @@ opp_high@1500000000 {
 		};
 	};
 
-	/*
-	 * The soc node represents the soc top level view. It is used for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap5-mpu";
-			ti,hwmods = "mpu";
-		};
-	};
-
 	/*
 	 * XXX: Use a flat representation of the SOC interconnect.
 	 * The real OMAP interconnect network is quite complex.
@@ -165,6 +153,21 @@ l4_wkup: interconnect@4ae00000 {
 		};
 		l4_per1: interconnect@48000000 {
 		};
+
+		target-module@48210000 {
+			compatible = "ti,sysc-omap4-simple", "ti,sysc";
+			power-domains = <&prm_mpu>;
+			clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;
+			clock-names = "fck";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x48210000 0x1f0000>;
+
+			mpu {
+				compatible = "ti,omap5-mpu";
+			};
+		};
+
 		l4_per2: interconnect@48400000 {
 		};
 		l4_per3: interconnect@48800000 {
-- 
2.30.1

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm
  2021-01-26 12:39 ` [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm Tony Lindgren
@ 2021-03-08 12:51   ` Tony Lindgren
  0 siblings, 0 replies; 20+ messages in thread
From: Tony Lindgren @ 2021-03-08 12:51 UTC (permalink / raw)
  To: linux-omap
  Cc: Benoît Cousson, devicetree, Bjorn Helgaas,
	Kishon Vijay Abraham I, Lorenzo Pieralisi, Vignesh Raghavendra,
	linux-pci

* Tony Lindgren <tony@atomide.com> [210126 12:43]:
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
...

> +		target-module@4e000000 {
> +			compatible = "ti,sysc-omap2", "ti,sysc";
>  			ti,hwmods = "dmm";
> +			reg = <0x4e000000 0x4>,
> +			      <0x4e000010 0x4>;
> +			reg-names = "rev", "sysc";
> +			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> +					<SYSC_IDLE_NO>,
> +					<SYSC_IDLE_SMART>;
> +			ranges = <0x0 0x4e000000 0x2000000>;
> +			#size-cells = <1>;
> +			#address-cells = <1>;
> +
> +			dmm@0 {
> +				compatible = "ti,omap5-dmm";
> +				reg = <0x4e000000 0x800>;
> +				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> +			};
>  		};


The dmm@0 reg property above should be zero instead of 0x4e000000 now that
we're using ranges. Looks like I did not test with omapdrm loaded earlier,
updated patch below.

Regards,

Tony

8< ---------------------------
From tony Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Mon, 8 Mar 2021 14:22:49 +0200
Subject: [PATCH] ARM: dts: Configure interconnect target module for dra7
 dmm

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
 arch/arm/boot/dts/dra7.dtsi | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -464,11 +464,24 @@ edma_tptc1: dma@0 {
 			};
 		};
 
-		dmm@4e000000 {
-			compatible = "ti,omap5-dmm";
-			reg = <0x4e000000 0x800>;
-			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+		target-module@4e000000 {
+			compatible = "ti,sysc-omap2", "ti,sysc";
 			ti,hwmods = "dmm";
+			reg = <0x4e000000 0x4>,
+			      <0x4e000010 0x4>;
+			reg-names = "rev", "sysc";
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+					<SYSC_IDLE_NO>,
+					<SYSC_IDLE_SMART>;
+			ranges = <0x0 0x4e000000 0x2000000>;
+			#size-cells = <1>;
+			#address-cells = <1>;
+
+			dmm@0 {
+				compatible = "ti,omap5-dmm";
+				reg = <0 0x800>;
+				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		ipu1: ipu@58820000 {
-- 
2.30.1

^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, back to index

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-26 12:39 [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Tony Lindgren
2021-01-26 12:39 ` [PATCH 01/15] PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver Tony Lindgren
2021-01-28  8:54   ` Tony Lindgren
2021-01-26 12:39 ` [PATCH 02/15] ARM: dts: Update pcie ranges for dra7 Tony Lindgren
2021-01-26 12:39 ` [PATCH 03/15] ARM: dts: Configure interconnect target module for dra7 pcie Tony Lindgren
2021-01-26 12:39 ` [PATCH 04/15] ARM: dts: Properly configure dra7 edma sysconfig registers Tony Lindgren
2021-01-26 12:39 ` [PATCH 05/15] ARM: dts: Move dra7 l3 noc to a separate node Tony Lindgren
2021-01-26 12:39 ` [PATCH 06/15] ARM: dts: Configure interconnect target module for dra7 qspi Tony Lindgren
2021-01-26 12:39 ` [PATCH 07/15] ARM: dts: Configure interconnect target module for dra7 sata Tony Lindgren
2021-01-26 12:39 ` [PATCH 08/15] ARM: dts: Configure interconnect target module for dra7 mpu Tony Lindgren
2021-03-08 11:53   ` Tony Lindgren
2021-01-26 12:39 ` [PATCH 09/15] ARM: dts: Configure interconnect target module for dra7 dmm Tony Lindgren
2021-03-08 12:51   ` Tony Lindgren
2021-01-26 12:39 ` [PATCH 10/15] ARM: dts: Configure simple-pm-bus for dra7 l4_wkup Tony Lindgren
2021-01-26 12:40 ` [PATCH 11/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per1 Tony Lindgren
2021-01-26 12:40 ` [PATCH 12/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per2 Tony Lindgren
2021-01-26 12:40 ` [PATCH 13/15] ARM: dts: Configure simple-pm-bus for dra7 l4_per3 Tony Lindgren
2021-01-26 12:40 ` [PATCH 14/15] ARM: dts: Configure simple-pm-bus for dra7 l4_cfg Tony Lindgren
2021-01-26 12:40 ` [PATCH 15/15] ARM: dts: Configure simple-pm-bus for dra7 l3 Tony Lindgren
2021-03-08 11:20 ` [PATCHv2 00/15] Update dra7 devicetree files to probe with genpd Kishon Vijay Abraham I

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