From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Andrew Davis" <afd@ti.com>,
"Frank Binns" <frank.binns@imgtec.com>,
"Donald Robson" <donald.robson@imgtec.com>,
"Matt Coster" <matt.coster@imgtec.com>,
"H . Nikolaus Schaller" <hns@goldelico.com>,
"Adam Ford" <aford173@gmail.com>,
"Ivaylo Dimitrov" <ivo.g.dimitrov.75@gmail.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Benoît Cousson" <bcousson@baylibre.com>,
"Tony Lindgren" <tony@atomide.com>, "Nishanth Menon" <nm@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Tero Kristo" <kristo@kernel.org>,
"Paul Cercueil" <paul@crapouillou.net>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-omap@vger.kernel.org,
linux-mips@vger.kernel.org
Subject: Re: [PATCH RFC 01/10] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
Date: Tue, 5 Dec 2023 08:10:09 +0100 [thread overview]
Message-ID: <b97f04f6-cda2-4e9b-b729-a5149e36f978@linaro.org> (raw)
In-Reply-To: <20231204182245.33683-2-afd@ti.com>
On 04/12/2023 19:22, Andrew Davis wrote:
> The Imagination PowerVR Series5 "SGX" GPU is part of several SoCs from
> multiple vendors. Describe how the SGX GPU is integrated in these SoC,
> including register space and interrupts. Clocks, reset, and power domain
> information is SoC specific.
>
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
> .../devicetree/bindings/gpu/img,powervr.yaml | 69 +++++++++++++++++--
> 1 file changed, 63 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr.yaml b/Documentation/devicetree/bindings/gpu/img,powervr.yaml
> index a13298f1a1827..9f036891dad0b 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr.yaml
> @@ -11,11 +11,33 @@ maintainers:
> - Frank Binns <frank.binns@imgtec.com>
>
> properties:
> + $nodename:
> + pattern: '^gpu@[a-f0-9]+$'
Why? We do not enforce it in other bindings.
> +
> compatible:
> - items:
> - - enum:
> - - ti,am62-gpu
> - - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
> + oneOf:
> + - items:
> + - enum:
> + - ti,am62-gpu
> + - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
> + - items:
> + - enum:
> + - ti,omap3430-gpu # Rev 121
> + - ti,omap3630-gpu # Rev 125
> + - const: img,powervr-sgx530
> + - items:
> + - enum:
> + - ingenic,jz4780-gpu # Rev 130
> + - ti,omap4430-gpu # Rev 120
> + - const: img,powervr-sgx540
> + - items:
> + - enum:
> + - allwinner,sun6i-a31-gpu # MP2 Rev 115
> + - ti,omap4470-gpu # MP1 Rev 112
> + - ti,omap5432-gpu # MP2 Rev 105
> + - ti,am5728-gpu # MP2 Rev 116
> + - ti,am6548-gpu # MP1 Rev 117
> + - const: img,powervr-sgx544
>
> reg:
> maxItems: 1
> @@ -40,8 +62,6 @@ properties:
> required:
> - compatible
> - reg
> - - clocks
> - - clock-names
I don't think so... How can you run without clocks?
> - interrupts
>
> additionalProperties: false
> @@ -56,6 +76,43 @@ allOf:
> properties:
> clocks:
> maxItems: 1
> + required:
> + - clocks
> + - clock-names
You need to define the clocks for your variants or disallow them. The
original code should be fixed as well and make the clocks fixed for all
img-axe cases.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-12-05 7:10 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-04 18:22 [PATCH RFC 00/10] Device tree support for Imagination Series5 GPU Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 01/10] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs Andrew Davis
2023-12-05 6:57 ` Maxime Ripard
2023-12-05 8:18 ` H. Nikolaus Schaller
2023-12-05 13:29 ` Maxime Ripard
2023-12-05 13:50 ` H. Nikolaus Schaller
2023-12-07 9:20 ` Maxime Ripard
2023-12-07 10:33 ` H. Nikolaus Schaller
2023-12-15 13:33 ` Maxime Ripard
2023-12-18 9:28 ` H. Nikolaus Schaller
2023-12-18 10:14 ` Maxime Ripard
2023-12-18 10:54 ` H. Nikolaus Schaller
2023-12-19 17:19 ` Andrew Davis
2023-12-21 9:02 ` Maxime Ripard
2023-12-21 8:58 ` Maxime Ripard
2023-12-21 15:23 ` H. Nikolaus Schaller
2023-12-05 7:10 ` Krzysztof Kozlowski [this message]
2023-12-05 7:56 ` Tony Lindgren
2023-12-05 8:03 ` Krzysztof Kozlowski
2023-12-05 8:10 ` Tony Lindgren
2023-12-05 8:16 ` Krzysztof Kozlowski
2023-12-05 8:30 ` Tony Lindgren
2023-12-05 8:45 ` Krzysztof Kozlowski
2023-12-05 9:02 ` Andreas Kemnade
2023-12-05 9:27 ` Krzysztof Kozlowski
2023-12-05 9:43 ` Andreas Kemnade
2023-12-07 6:38 ` Tony Lindgren
2023-12-05 8:17 ` H. Nikolaus Schaller
2023-12-05 17:33 ` Andrew Davis
2023-12-05 18:04 ` H. Nikolaus Schaller
2023-12-06 16:02 ` Conor Dooley
2023-12-06 16:15 ` Andrew Davis
2023-12-06 22:02 ` H. Nikolaus Schaller
2023-12-06 21:43 ` H. Nikolaus Schaller
2023-12-04 18:22 ` [PATCH RFC 02/10] ARM: dts: omap3: Add device tree entry for SGX GPU Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 03/10] ARM: dts: omap4: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 04/10] ARM: dts: omap5: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 05/10] ARM: dts: AM33xx: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 06/10] ARM: dts: AM437x: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 07/10] ARM: dts: DRA7xx: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 08/10] arm64: dts: ti: k3-am654-main: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 09/10] ARM: dts: sun6i: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 10/10] MIPS: DTS: jz4780: " Andrew Davis
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