From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2C19C1975A for ; Thu, 12 Mar 2020 10:56:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9E0F620716 for ; Thu, 12 Mar 2020 10:56:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=ellerman.id.au header.i=@ellerman.id.au header.b="kjtDKke2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726731AbgCLK4E (ORCPT ); Thu, 12 Mar 2020 06:56:04 -0400 Received: from ozlabs.org ([203.11.71.1]:35749 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725978AbgCLK4D (ORCPT ); Thu, 12 Mar 2020 06:56:03 -0400 Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 48dQjL3pfwz9sPF; Thu, 12 Mar 2020 21:55:50 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ellerman.id.au; s=201909; t=1584010558; bh=72/MkVf9VVMOXQXQBCEOJd5iIUWgKkmEQGqh1LToq2c=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=kjtDKke2a24ahWnaI2Uj0G4Fe2Y+Jmmv/GYwuEOLFEW9uRKLJ/Eh8hY/uIvPOkWOq hSpbFhZ+nkMkq9HnJFD5n60KJODzNOkbfNQ2xKBvxmtGjcLFu/cP0AF6WyLXOSMULb 6fFjUvKvb8/nZ+iPRU20W0VkcxW1QK6SeQvdds5ZfmEH3nf/wYggGS/dPu8fp0XU/0 5piT2dBaqMVbWuvgxSVjBFiUYMtS2zI6exgAeql41Nme4eoBMZr+hItq7bW8gr3rM3 jCRuhb1gAjdGh5ftRaRGO6Z5fFXzHCOWGuRXdE2RxOkjZdMiy8L8pyOPyQMC+hwaj9 VAqGftLnfpYYg== From: Michael Ellerman To: Krzysztof Kozlowski , Richard Henderson , Ivan Kokshaysky , Matt Turner , Alexey Brodkin , Vineet Gupta , "James E.J. Bottomley" , Helge Deller , Benjamin Herrenschmidt , Paul Mackerras , Yoshinori Sato , Rich Felker , Dave Airlie , David Airlie , Daniel Vetter , Ben Skeggs , Mauro Carvalho Chehab , Jiri Slaby , Nick Kossifidis , Luis Chamberlain , Kalle Valo , "David S. Miller" , Dave Jiang , Jon Mason , Allen Hubbe , "Michael S. Tsirkin" , Jason Wang , Arnd Bergmann , Geert Uytterhoeven , Andrew Morton , Thomas Gleixner , linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-sh@vger.kernel.org, dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-media@vger.kernel.org, linux-wireless@vger.kernel.org, netdev@vger.kernel.org, linux-ntb@googlegroups.com, virtualization@lists.linux-foundation.org, linux-arch@vger.kernel.org Cc: Krzysztof Kozlowski Subject: Re: [RESEND PATCH v2 1/9] iomap: Constify ioreadX() iomem argument (as in generic implementation) In-Reply-To: <20200219175007.13627-2-krzk@kernel.org> References: <20200219175007.13627-1-krzk@kernel.org> <20200219175007.13627-2-krzk@kernel.org> Date: Thu, 12 Mar 2020 21:55:44 +1100 Message-ID: <87ftedj0zz.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-parisc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org Krzysztof Kozlowski writes: > diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c > index 5ac84efc6ede..9fe4fb3b08aa 100644 > --- a/arch/powerpc/kernel/iomap.c > +++ b/arch/powerpc/kernel/iomap.c > @@ -15,23 +15,23 @@ > * Here comes the ppc64 implementation of the IOMAP > * interfaces. > */ > -unsigned int ioread8(void __iomem *addr) > +unsigned int ioread8(const void __iomem *addr) > { > return readb(addr); > } > -unsigned int ioread16(void __iomem *addr) > +unsigned int ioread16(const void __iomem *addr) > { > return readw(addr); > } > -unsigned int ioread16be(void __iomem *addr) > +unsigned int ioread16be(const void __iomem *addr) > { > return readw_be(addr); > } > -unsigned int ioread32(void __iomem *addr) > +unsigned int ioread32(const void __iomem *addr) > { > return readl(addr); > } > -unsigned int ioread32be(void __iomem *addr) > +unsigned int ioread32be(const void __iomem *addr) > { > return readl_be(addr); > } > @@ -41,27 +41,27 @@ EXPORT_SYMBOL(ioread16be); > EXPORT_SYMBOL(ioread32); > EXPORT_SYMBOL(ioread32be); > #ifdef __powerpc64__ > -u64 ioread64(void __iomem *addr) > +u64 ioread64(const void __iomem *addr) > { > return readq(addr); > } > -u64 ioread64_lo_hi(void __iomem *addr) > +u64 ioread64_lo_hi(const void __iomem *addr) > { > return readq(addr); > } > -u64 ioread64_hi_lo(void __iomem *addr) > +u64 ioread64_hi_lo(const void __iomem *addr) > { > return readq(addr); > } > -u64 ioread64be(void __iomem *addr) > +u64 ioread64be(const void __iomem *addr) > { > return readq_be(addr); > } > -u64 ioread64be_lo_hi(void __iomem *addr) > +u64 ioread64be_lo_hi(const void __iomem *addr) > { > return readq_be(addr); > } > -u64 ioread64be_hi_lo(void __iomem *addr) > +u64 ioread64be_hi_lo(const void __iomem *addr) > { > return readq_be(addr); > } > @@ -139,15 +139,15 @@ EXPORT_SYMBOL(iowrite64be_hi_lo); > * FIXME! We could make these do EEH handling if we really > * wanted. Not clear if we do. > */ > -void ioread8_rep(void __iomem *addr, void *dst, unsigned long count) > +void ioread8_rep(const void __iomem *addr, void *dst, unsigned long count) > { > readsb(addr, dst, count); > } > -void ioread16_rep(void __iomem *addr, void *dst, unsigned long count) > +void ioread16_rep(const void __iomem *addr, void *dst, unsigned long count) > { > readsw(addr, dst, count); > } > -void ioread32_rep(void __iomem *addr, void *dst, unsigned long count) > +void ioread32_rep(const void __iomem *addr, void *dst, unsigned long count) > { > readsl(addr, dst, count); > } This looks OK to me. Acked-by: Michael Ellerman (powerpc) cheers