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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id ec40sm1776603edb.68.2022.02.06.03.29.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Feb 2022 03:29:46 -0800 (PST) Message-ID: <04ef74c4-71f6-559c-f054-5267086abc22@canonical.com> Date: Sun, 6 Feb 2022 12:29:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH V1 07/10] arm64: tegra: Enable PCIe slots in P3737-0000 board Content-Language: en-US To: Vidya Sagar , bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com Cc: kishon@ti.com, vkoul@kernel.org, kw@linux.com, p.zabel@pengutronix.de, mperttunen@nvidia.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com References: <20220205162144.30240-1-vidyas@nvidia.com> <20220205162144.30240-8-vidyas@nvidia.com> From: Krzysztof Kozlowski In-Reply-To: <20220205162144.30240-8-vidyas@nvidia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 05/02/2022 17:21, Vidya Sagar wrote: > Enable PCIe controller nodes to enable respective PCIe slots on > P3737-0000 board. Following is the ownership of slots by different > PCIe controllers. > Controller-1 : On-board Broadcom WiFi controller > Controller-4 : M.2 Key-M slot > Controller-5 : CEM form-factor x8 slot > > Signed-off-by: Vidya Sagar > --- > .../nvidia/tegra234-p3737-0000+p3701-0000.dts | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > index efbbb878ba5a..b819e1133bc4 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts > @@ -21,4 +21,30 @@ > serial { > status = "okay"; > }; > + > + pcie@14100000 { > + status = "okay"; > + > + phys = <&p2u_hsio_3>; > + phy-names = "p2u-0"; > + }; > + > + pcie@14160000 { > + status = "okay"; > + > + phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, > + <&p2u_hsio_7>; > + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; > + }; > + > + pcie@141a0000 { > + status = "okay"; > + > + phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, > + <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, > + <&p2u_nvhs_6>, <&p2u_nvhs_7>; > + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", > + "p2u-5", "p2u-6", "p2u-7"; > + }; > + No need for trailing new line. > }; Best regards, Krzysztof