From: "Chocron, Jonathan" <jonnyc@amazon.com>
To: "robh@kernel.org" <robh@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"Woodhouse, David" <dwmw@amazon.co.uk>,
"Hanoch, Uri" <hanochu@amazon.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
"Wasserstrom, Barak" <barakw@amazon.com>,
"Saidi, Ali" <alisaidi@amazon.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"Hawa, Hanna" <hhhawa@amazon.com>,
"Shenhar, Talel" <talel@amazon.com>,
"Krupnik, Ronen" <ronenk@amazon.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"benh@kernel.crashing.org" <benh@kernel.crashing.org>,
"Chocron, Jonathan" <jonnyc@amazon.com>
Subject: Re: [PATCH v3 5/8] dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding
Date: Tue, 13 Aug 2019 16:48:56 +0000 [thread overview]
Message-ID: <06c198ff2f8f9b1b29283a7b8764ab776c1e574b.camel@amazon.com> (raw)
In-Reply-To: <20190813153046.GA31480@bogus>
On Tue, 2019-08-13 at 09:30 -0600, Rob Herring wrote:
> On Tue, Jul 23, 2019 at 12:27:08PM +0300, Jonathan Chocron wrote:
> > Document Amazon's Annapurna Labs PCIe host bridge.
> >
> > Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
> > ---
> > .../devicetree/bindings/pci/pcie-al.txt | 45
> > +++++++++++++++++++
> > MAINTAINERS | 3 +-
> > 2 files changed, 47 insertions(+), 1 deletion(-)
> > create mode 100644 Documentation/devicetree/bindings/pci/pcie-
> > al.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pci/pcie-al.txt
> > b/Documentation/devicetree/bindings/pci/pcie-al.txt
> > new file mode 100644
> > index 000000000000..89876190eb5a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/pcie-al.txt
> > @@ -0,0 +1,45 @@
> > +* Amazon Annapurna Labs PCIe host bridge
> > +
> > +Amazon's Annapurna Labs PCIe Host Controller is based on the
> > Synopsys DesignWare
> > +PCI core.
> > +It shares common functions with the PCIe DesignWare core driver
> > and inherits
>
> Driver details are irrelevant to the binding.
>
Will remove.
> > +common properties defined in
> > Documentation/devicetree/bindings/pci/designware-pcie.txt.
> > +Properties of the host controller node that differ from it are:
> > +
> > +- compatible:
> > + Usage: required
> > + Value type: <stringlist>
> > + Definition: Value should contain
> > + - "amazon,al-pcie"
>
> Needs to be SoC specific.
>
I'm not sure I follow. The PCIe controller can be implemented in
different SoCs. Could you please clarify?
> > +
> > +- reg:
> > + Usage: required
> > + Value type: <prop-encoded-array>
> > + Definition: Register ranges as listed in the reg-names property
> > +
> > +- reg-names:
> > + Usage: required
> > + Value type: <stringlist>
> > + Definition: Must include the following entries
> > + - "config" PCIe ECAM space
> > + - "controller" AL proprietary registers
> > + - "dbi" Designware PCIe registers
> > +
> > +Example:
> > +
> > + pcie-external0: pcie@fb600000 {
> > + compatible = "amazon,al-pcie";
> > + reg = <0x0 0xfb600000 0x0 0x00100000
> > + 0x0 0xfd800000 0x0 0x00010000
> > + 0x0 0xfd810000 0x0 0x00001000>;
> > + reg-names = "config", "controller", "dbi";
> > + bus-range = <0 255>;
> > + device_type = "pci";
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + #interrupt-cells = <1>;
> > + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-map-mask = <0x00 0 0 7>;
> > + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41
> > IRQ_TYPE_LEVEL_HIGH>; /* INTa */
> > + ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0
> > 0x07ff0000>;
> > + };
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 5a6137df3f0e..29cca14a05a6 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -12201,10 +12201,11 @@ T: git
> > git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/
> > S: Supported
> > F: drivers/pci/controller/
> >
> > -PCIE DRIVER FOR ANNAPURNA LABS
> > +PCIE DRIVER FOR AMAZON ANNAPURNA LABS
> > M: Jonathan Chocron <jonnyc@amazon.com>
> > L: linux-pci@vger.kernel.org
> > S: Maintained
> > +F: Documentation/devicetree/bindings/pci/pcie-al.txt
> > F: drivers/pci/controller/dwc/pcie-al.c
> >
> > PCIE DRIVER FOR AMLOGIC MESON
> > --
> > 2.17.1
> >
next prev parent reply other threads:[~2019-08-13 16:49 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-23 9:25 [PATCH v3 0/8] Amazon's Annapurna Labs DT-based PCIe host controller driver Jonathan Chocron
2019-07-23 9:25 ` [PATCH v3 1/8] PCI: Add Amazon's Annapurna Labs vendor ID Jonathan Chocron
2019-08-19 17:51 ` Andrew Murray
2019-07-23 9:25 ` [PATCH v3 2/8] PCI: Add ACS quirk for Amazon Annapurna Labs root ports Jonathan Chocron
2019-07-23 9:25 ` [PATCH v3 3/8] PCI/VPD: Add VPD release quirk for Amazon's Annapurna Labs Root Port Jonathan Chocron
2019-07-23 9:25 ` [PATCH v3 4/8] PCI: Add quirk to disable MSI-X support " Jonathan Chocron
2019-08-19 18:23 ` Andrew Murray
2019-08-20 14:52 ` Chocron, Jonathan
2019-08-20 15:25 ` Andrew Murray
2019-08-20 17:06 ` Chocron, Jonathan
2019-08-20 19:54 ` Andrew Murray
2019-08-21 10:30 ` Chocron, Jonathan
2019-07-23 9:27 ` [PATCH v3 5/8] dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding Jonathan Chocron
2019-08-13 15:30 ` Rob Herring
2019-08-13 16:48 ` Chocron, Jonathan [this message]
2019-08-13 20:46 ` Rob Herring
2019-08-19 16:15 ` Chocron, Jonathan
2019-07-23 9:27 ` [PATCH v3 6/8] PCI: al: Add support for DW based driver type Jonathan Chocron
2019-07-23 9:40 ` Gustavo Pimentel
2019-08-12 17:03 ` Lorenzo Pieralisi
2019-08-14 11:39 ` Chocron, Jonathan
2019-07-23 9:27 ` [PATCH v3 7/8] PCI: dw: Add validation that PCIe core is set to correct mode Jonathan Chocron
2019-07-23 9:27 ` [PATCH v3 8/8] PCI: dw: Add support for PCI_PROBE_ONLY/PCI_REASSIGN_ALL_BUS flags Jonathan Chocron
2019-08-07 16:36 ` Lorenzo Pieralisi
2019-08-08 9:30 ` Chocron, Jonathan
2019-08-08 10:58 ` Lorenzo Pieralisi
2019-08-12 18:05 ` Chocron, Jonathan
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