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Subject: Re: [PATCH V4 1/2] PCI: dwc: Add API support to de-initialize host
From:   Vidya Sagar <vidyas@nvidia.com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
CC:     <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
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Date:   Tue, 18 Jun 2019 10:19:14 +0530
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On 6/13/2019 11:54 PM, Vidya Sagar wrote:
> On 6/7/2019 6:43 PM, Vidya Sagar wrote:
>> On 5/27/2019 4:39 PM, Vidya Sagar wrote:
>>> On 5/7/2019 12:25 PM, Vidya Sagar wrote:
>>>> On 5/7/2019 11:19 AM, Vidya Sagar wrote:
>>>>> On 5/3/2019 4:53 PM, Lorenzo Pieralisi wrote:
>>>>>> On Thu, May 02, 2019 at 10:34:25PM +0530, Vidya Sagar wrote:
>>>>>>> Add an API to group all the tasks to be done to de-initialize host =
which
>>>>>>> can then be called by any DesignWare core based driver implementati=
ons
>>>>>>> while adding .remove() support in their respective drivers.
>>>>>>>
>>>>>>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>>>>>>> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>>>>>>> ---
>>>>>>> Changes from v3:
>>>>>>> * Added check if (pci_msi_enabled() && !pp->ops->msi_host_init) bef=
ore calling
>>>>>>> =C2=A0=C2=A0 dw_pcie_free_msi() API to mimic init path
>>>>>>>
>>>>>>> Changes from v2:
>>>>>>> * Rebased on top of linux-next top of the tree branch
>>>>>>>
>>>>>>> Changes from v1:
>>>>>>> * s/Designware/DesignWare
>>>>>>>
>>>>>>> =C2=A0 drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++++=
++
>>>>>>> =C2=A0 drivers/pci/controller/dwc/pcie-designware.h=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 | 5 +++++
>>>>>>> =C2=A0 2 files changed, 13 insertions(+)
>>>>>>
>>>>>> Series doesn't apply to v5.1-rc1, what's based on ? I suspect
>>>>>> there is a dependency on pci/keystone, given the tight timeline
>>>>>> for the merge window, would you mind postponing it to v5.3 ?
>>>>>>
>>>>>> I do not think it is urgent, I am happy to create a branch
>>>>>> for it as soon as v5.2-rc1 is released.
>>>>> I rebased my changes on top of linux-next. I see that they have confl=
icts
>>>>> on top of v5.1-rc1. Do you want me to rebase them on top of v5.1-rc1 =
instead
>>>>> of linux-next?
>>>>> I'm fine with v5.2-rc1 as well.I forgot to mention that these changes=
 are made on top of Jisheng's patches
>>>> FWIW, Jisheng's patches are approved and applied to pci/dwc for v5.2
>>>> https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1968324.h=
tml
>>>
>>> Hi Lorenzo,
>>> Now that v5.2-rc2 is also available, could you please pick up this seri=
es?
>>>
>>> Thanks,
>>> Vidya Sagar
>>>
>> Hi Bjorn / Lorenzo,
>> Can you please pick up these two patches?
>>
>> Thanks,
>> Vidya Sagar
> Apologies for pinging again. These two patches can be applied directly on=
 top of
> v5.2-rc4. Please do let me know if there is anything required from my sid=
e.
>=20
> Thanks,
> Vidya Sagar
>=20
Sorry for pinging again. Please let me know if these patches need to be sen=
t again.

Thanks,
Vidya Sagar

>=20
>>
>>>>
>>>>>
>>>>>>
>>>>>> Thanks,
>>>>>> Lorenzo
>>>>>>
>>>>>>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/dr=
ivers/pci/controller/dwc/pcie-designware-host.c
>>>>>>> index 77db32529319..d069e4290180 100644
>>>>>>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>>>>>>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>>>>>>> @@ -496,6 +496,14 @@ int dw_pcie_host_init(struct pcie_port *pp)
>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return ret;
>>>>>>> =C2=A0 }
>>>>>>> +void dw_pcie_host_deinit(struct pcie_port *pp)
>>>>>>> +{
>>>>>>> +=C2=A0=C2=A0=C2=A0 pci_stop_root_bus(pp->root_bus);
>>>>>>> +=C2=A0=C2=A0=C2=A0 pci_remove_root_bus(pp->root_bus);
>>>>>>> +=C2=A0=C2=A0=C2=A0 if (pci_msi_enabled() && !pp->ops->msi_host_ini=
t)
>>>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dw_pcie_free_msi(pp);
>>>>>>> +}
>>>>>>> +
>>>>>>> =C2=A0 static int dw_pcie_access_other_conf(struct pcie_port *pp, s=
truct pci_bus *bus,
>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 u32 devf=
n, int where, int size, u32 *val,
>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool wri=
te)
>>>>>>> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers=
/pci/controller/dwc/pcie-designware.h
>>>>>>> index deab426affd3..4f48ec78c7b9 100644
>>>>>>> --- a/drivers/pci/controller/dwc/pcie-designware.h
>>>>>>> +++ b/drivers/pci/controller/dwc/pcie-designware.h
>>>>>>> @@ -348,6 +348,7 @@ void dw_pcie_msi_init(struct pcie_port *pp);
>>>>>>> =C2=A0 void dw_pcie_free_msi(struct pcie_port *pp);
>>>>>>> =C2=A0 void dw_pcie_setup_rc(struct pcie_port *pp);
>>>>>>> =C2=A0 int dw_pcie_host_init(struct pcie_port *pp);
>>>>>>> +void dw_pcie_host_deinit(struct pcie_port *pp);
>>>>>>> =C2=A0 int dw_pcie_allocate_domains(struct pcie_port *pp);
>>>>>>> =C2=A0 #else
>>>>>>> =C2=A0 static inline irqreturn_t dw_handle_msi_irq(struct pcie_port=
 *pp)
>>>>>>> @@ -372,6 +373,10 @@ static inline int dw_pcie_host_init(struct pci=
e_port *pp)
>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0;
>>>>>>> =C2=A0 }
>>>>>>> +static inline void dw_pcie_host_deinit(struct pcie_port *pp)
>>>>>>> +{
>>>>>>> +}
>>>>>>> +
>>>>>>> =C2=A0 static inline int dw_pcie_allocate_domains(struct pcie_port =
*pp)
>>>>>>> =C2=A0 {
>>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 0;
>>>>>>> --=20
>>>>>>> 2.17.1
>>>>>>>
>>>>>
>>>>
>>>
>>
>=20