From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thierry Reding <thierry.reding@gmail.com>, <bhelgaas@google.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>,
<jonathanh@nvidia.com>, <vidyas@nvidia.com>,
<linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>
Subject: Re: [PATCH V4 27/28] PCI: tegra: Add support for GPIO based PERST#
Date: Mon, 17 Jun 2019 15:57:09 +0530 [thread overview]
Message-ID: <0f9bb97d-5a30-a654-0cc6-a57a7bd894c8@nvidia.com> (raw)
In-Reply-To: <20190617094839.GE18020@e121166-lin.cambridge.arm.com>
On 17-Jun-19 3:18 PM, Lorenzo Pieralisi wrote:
> On Fri, Jun 14, 2019 at 10:53:13PM +0530, Manikanta Maddireddy wrote:
>
> [...]
>
>>> Ok. My point then is that you have no way to enforce this requirement on
>>> platforms that actually need it, I do not even know if there is a
>>> way you can do it (I was thinking along the lines of using a
>>> compatible string to detect whether the GPIO #PERST reset is mandatory)
>>> but maybe this is not even a SOC property.
>>>
>>> Maybe what I am asking is overkill, I just wanted to understand.
>>>
>>> I was just asking a question to understand how you handle the case
>>> where a GPIO pin definition is missing in DT for a platform that
>>> actually needs it, the driver will probe but nothing will work.
>>>
>>> It would be good to describe this and capture it in the commit log.
>>>
>>> Thanks,
>>> Lorenzo
>> I can't think of a easy way to enforce this requirement. As you said
>> compatible string is per SOC, so we can't use it for a platform.
>> This issue is present on only one platform, so it is hard to miss the
>> DT property. That is the reason for publishing this patch with out this
>> enforcement in driver.
>>
>> I thought for changing PERST# to GPIO for all platform, but testing is
>> a tedious job. Also I don't have Tegra20 and Tegra30 platforms.
> I can't help with that.
>
>> Do you want me to drop the patch or update the limitation in the commit
>> log?
> It is Thierry's call, if he is OK with it fine by me, please do
> update the commit log, it will help everybody understand.
>
> Lorenzo
Sure, I will update the commit log in V5.
Please let me know if you completed reviewing this series, I will
send V5 addressing review comments in this patch.
Manikanta
next prev parent reply other threads:[~2019-06-17 10:27 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 5:52 [PATCH V4 00/28] Enable Tegra PCIe root port features Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 01/28] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 02/28] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 03/28] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 04/28] PCI: tegra: Mask AFI_INTR in runtime suspend Manikanta Maddireddy
2019-06-04 13:08 ` Thierry Reding
2019-05-16 5:52 ` [PATCH V4 05/28] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 06/28] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 07/28] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 08/28] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 09/28] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 10/28] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 11/28] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 12/28] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 13/28] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 14/28] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 15/28] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 16/28] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 17/28] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 18/28] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 19/28] PCI: tegra: Change PRSNT_SENSE IRQ log to debug Manikanta Maddireddy
2019-05-16 5:52 ` [PATCH V4 20/28] PCI: tegra: Use legacy IRQ for port service drivers Manikanta Maddireddy
2019-05-20 20:37 ` Bjorn Helgaas
2019-05-21 9:07 ` Manikanta Maddireddy
2019-05-16 5:53 ` [PATCH V4 21/28] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy
2019-05-16 5:53 ` [PATCH V4 22/28] PCI: tegra: Access endpoint config only if PCIe link is up Manikanta Maddireddy
2019-06-04 13:14 ` Thierry Reding
2019-06-04 14:10 ` Manikanta Maddireddy
2019-06-10 4:38 ` Manikanta Maddireddy
2019-06-13 14:39 ` Lorenzo Pieralisi
2019-06-13 15:42 ` Thierry Reding
2019-06-17 10:01 ` Manikanta Maddireddy
2019-06-17 11:47 ` Thierry Reding
2019-06-17 19:30 ` Bjorn Helgaas
2019-06-18 5:36 ` Manikanta Maddireddy
2019-06-18 10:49 ` Thierry Reding
2019-06-18 12:32 ` Johannes Berg
2019-06-18 13:40 ` Thierry Reding
2019-06-18 14:48 ` Johannes Berg
2019-06-19 13:38 ` Bjorn Helgaas
2019-06-19 13:40 ` Johannes Berg
2019-05-16 5:53 ` [PATCH V4 23/28] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy
2019-05-16 5:53 ` [PATCH V4 24/28] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy
2019-05-16 5:53 ` [PATCH V4 25/28] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy
2019-05-16 5:53 ` [PATCH V4 26/28] PCI: Add DT binding for "reset-gpios" property Manikanta Maddireddy
2019-06-17 11:30 ` Thierry Reding
2019-06-17 11:38 ` Manikanta Maddireddy
2019-06-17 11:48 ` Thierry Reding
2019-05-16 5:53 ` [PATCH V4 27/28] PCI: tegra: Add support for GPIO based PERST# Manikanta Maddireddy
2019-06-04 13:22 ` Thierry Reding
2019-06-13 15:24 ` Lorenzo Pieralisi
2019-06-14 10:37 ` Manikanta Maddireddy
2019-06-14 14:32 ` Lorenzo Pieralisi
2019-06-14 14:38 ` Manikanta Maddireddy
2019-06-14 14:50 ` Lorenzo Pieralisi
2019-06-14 14:56 ` Manikanta Maddireddy
2019-06-14 15:23 ` Thierry Reding
2019-06-14 15:59 ` Lorenzo Pieralisi
2019-06-14 16:30 ` Manikanta Maddireddy
2019-06-14 16:53 ` Lorenzo Pieralisi
2019-06-14 17:23 ` Manikanta Maddireddy
2019-06-17 9:48 ` Lorenzo Pieralisi
2019-06-17 10:27 ` Manikanta Maddireddy [this message]
2019-06-17 10:39 ` Lorenzo Pieralisi
2019-06-17 11:29 ` Thierry Reding
2019-06-17 11:26 ` Thierry Reding
2019-05-16 5:53 ` [PATCH V4 28/28] PCI: tegra: Change link retry log level to debug Manikanta Maddireddy
2019-06-04 13:22 ` Thierry Reding
2019-05-16 13:12 ` [PATCH V4 00/28] Enable Tegra PCIe root port features Bjorn Helgaas
2019-05-17 8:38 ` Manikanta Maddireddy
2019-06-10 4:45 ` Manikanta Maddireddy
2019-06-10 17:33 ` Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0f9bb97d-5a30-a654-0cc6-a57a7bd894c8@nvidia.com \
--to=mmaddireddy@nvidia.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).