From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Gustavo Pimentel To: bhelgaas@google.com, lorenzo.pieralisi@arm.com, Joao.Pinto@synopsys.com, jingoohan1@gmail.com, kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com Subject: [PATCH v7 4/9] bindings: PCI: designware: Add support for the EP in Designware driver Date: Tue, 24 Apr 2018 14:44:41 +0100 Message-Id: <130650f98603a2d734b9a441a70b334dac4a402d.1524577064.git.gustavo.pimentel@synopsys.com> In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: Add device tree binding documentation for the Endpoint in PCIe Designware driver. Signed-off-by: Gustavo Pimentel Reviewed-by: Rob Herring --- Change v1->v2: - Add a missing log description. - Add "snps,dw-pcie" compatible string following Kishon's suggestion. Change v2->v3: - Reverted pcie_ep name to pcie. Changes v3->v4: - Reverted "snps,dw-pcie-rc" compatible string requested by Rob Herring. Changes v4->v5: - Removed device_type entry from EP requested by Rob Herring. Changes v5->v6: - Nothing changed, just to follow the patch set version. Changes v6->v7: - Nothing changed, just to follow the patch set version. Documentation/devicetree/bindings/pci/designware-pcie.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index 7f9804d..c124f9b 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -3,6 +3,7 @@ Required properties: - compatible: "snps,dw-pcie" for RC mode; + "snps,dw-pcie-ep" for EP mode; - reg: Should contain the configuration address space. - reg-names: Must be "config" for the PCIe configuration space. (The old way of getting the configuration address space from "ranges" @@ -56,3 +57,14 @@ Example configuration: #interrupt-cells = <1>; num-lanes = <1>; }; +or + pcie: pcie@dfc00000 { + compatible = "snps,dw-pcie-ep"; + reg = <0xdfc00000 0x0001000>, /* IP registers 1 */ + <0xdfc01000 0x0001000>, /* IP registers 2 */ + <0xd0000000 0x2000000>; /* Configuration space */ + reg-names = "dbi", "dbi2", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <2>; + num-lanes = <1>; + }; -- 2.7.4