From: Jiang Liu <liuj97@gmail.com>
To: Bjorn Helgaas <bhelgaas@google.com>, Don Dutile <ddutile@redhat.com>
Cc: Jiang Liu <jiang.liu@huawei.com>, Yinghai Lu <yinghai@kernel.org>,
Taku Izumi <izumi.taku@jp.fujitsu.com>,
"Rafael J . Wysocki" <rjw@sisk.pl>,
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>,
Yijing Wang <wangyijing@huawei.com>,
Keping Chen <chenkeping@huawei.com>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
Jiang Liu <liuj97@gmail.com>
Subject: [RFC PATCH 11/14] AER/PCI: use PCIe cap access functions to simplify implementation
Date: Tue, 10 Jul 2012 23:54:12 +0800 [thread overview]
Message-ID: <1341935655-5381-12-git-send-email-jiang.liu@huawei.com> (raw)
In-Reply-To: <1341935655-5381-1-git-send-email-jiang.liu@huawei.com>
In-Reply-To: <CAErSpo70NtEJFaQmDtdTLkSB3fQRNy78juAQO-KbXeceZkunkw@mail.gmail.com>
From: Jiang Liu <jiang.liu@huawei.com>
Use PCIe cap access functions to simplify PCI AER implementation.
Signed-off-by: Jiang Liu <liuj97@gmail.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
drivers/pci/pcie/aer/aerdrv.c | 16 ++++++-------
drivers/pci/pcie/aer/aerdrv_core.c | 45 ++++++++++++++----------------------
2 files changed, 24 insertions(+), 37 deletions(-)
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index f7c6245..27ec1bb 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -122,19 +122,18 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
static void aer_enable_rootport(struct aer_rpc *rpc)
{
struct pci_dev *pdev = rpc->rpd->port;
- int pos, aer_pos;
+ int aer_pos;
u16 reg16;
u32 reg32;
- pos = pci_pcie_cap(pdev);
/* Clear PCIe Capability's Device Status */
- pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, ®16);
- pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
+ pci_pcie_cap_read_word(pdev, PCI_EXP_DEVSTA, ®16);
+ pci_pcie_cap_write_word(pdev, PCI_EXP_DEVSTA, reg16);
/* Disable system error generation in response to error messages */
- pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, ®16);
+ pci_pcie_cap_read_word(pdev, PCI_EXP_RTCTL, ®16);
reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
- pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
+ pci_pcie_cap_write_word(pdev, PCI_EXP_RTCTL, reg16);
aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
/* Clear error status */
@@ -396,9 +395,8 @@ static void aer_error_resume(struct pci_dev *dev)
u16 reg16;
/* Clean up Root device status */
- pos = pci_pcie_cap(dev);
- pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, ®16);
- pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
+ pci_pcie_cap_read_word(dev, PCI_EXP_DEVSTA, ®16);
+ pci_pcie_cap_write_word(dev, PCI_EXP_DEVSTA, reg16);
/* Clean AER Root Error Status */
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index f551534..5671fce 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -35,25 +35,20 @@ module_param(nosourceid, bool, 0);
int pci_enable_pcie_error_reporting(struct pci_dev *dev)
{
u16 reg16 = 0;
- int pos;
if (pcie_aer_get_firmware_first(dev))
return -EIO;
- pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
- if (!pos)
- return -EIO;
-
- pos = pci_pcie_cap(dev);
- if (!pos)
+ if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
return -EIO;
- pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, ®16);
- reg16 |= (PCI_EXP_DEVCTL_CERE |
- PCI_EXP_DEVCTL_NFERE |
- PCI_EXP_DEVCTL_FERE |
- PCI_EXP_DEVCTL_URRE);
- pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
+ if (!pci_pcie_cap_read_word(dev, PCI_EXP_DEVCTL, ®16)) {
+ reg16 |= (PCI_EXP_DEVCTL_CERE |
+ PCI_EXP_DEVCTL_NFERE |
+ PCI_EXP_DEVCTL_FERE |
+ PCI_EXP_DEVCTL_URRE);
+ pci_pcie_cap_write_word(dev, PCI_EXP_DEVCTL, reg16);
+ }
return 0;
}
@@ -62,21 +57,17 @@ EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
int pci_disable_pcie_error_reporting(struct pci_dev *dev)
{
u16 reg16 = 0;
- int pos;
if (pcie_aer_get_firmware_first(dev))
return -EIO;
- pos = pci_pcie_cap(dev);
- if (!pos)
- return -EIO;
-
- pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, ®16);
- reg16 &= ~(PCI_EXP_DEVCTL_CERE |
- PCI_EXP_DEVCTL_NFERE |
- PCI_EXP_DEVCTL_FERE |
- PCI_EXP_DEVCTL_URRE);
- pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
+ if (!pci_pcie_cap_read_word(dev, PCI_EXP_DEVCTL, ®16)) {
+ reg16 &= ~(PCI_EXP_DEVCTL_CERE |
+ PCI_EXP_DEVCTL_NFERE |
+ PCI_EXP_DEVCTL_FERE |
+ PCI_EXP_DEVCTL_URRE);
+ pci_pcie_cap_write_word(dev, PCI_EXP_DEVCTL, reg16);
+ }
return 0;
}
@@ -151,18 +142,16 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
*/
if (atomic_read(&dev->enable_cnt) == 0)
return false;
- pos = pci_pcie_cap(dev);
- if (!pos)
- return false;
/* Check if AER is enabled */
- pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, ®16);
+ pci_pcie_cap_read_word(dev, PCI_EXP_DEVCTL, ®16);
if (!(reg16 & (
PCI_EXP_DEVCTL_CERE |
PCI_EXP_DEVCTL_NFERE |
PCI_EXP_DEVCTL_FERE |
PCI_EXP_DEVCTL_URRE)))
return false;
+
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
if (!pos)
return false;
--
1.7.9.5
next prev parent reply other threads:[~2012-07-10 15:54 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-04 7:44 [Resend with Ack][PATCH v1] PCI: allow acpiphp to handle PCIe ports without native PCIe hotplug capability Jiang Liu
2012-06-04 8:23 ` Kenji Kaneshige
2012-07-03 4:16 ` Bjorn Helgaas
2012-07-03 15:59 ` Bjorn Helgaas
2012-07-03 19:50 ` Don Dutile
2012-07-04 18:07 ` Bjorn Helgaas
2012-07-09 10:05 ` Jiang Liu
2012-07-09 17:05 ` Bjorn Helgaas
2012-07-04 2:52 ` Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 00/14] improve PCIe capabilities registers handling Jiang Liu
2012-07-10 18:44 ` Bjorn Helgaas
2012-07-10 15:54 ` [RFC PATCH 01/14] PCI: add pcie_flags into struct pci_dev to cache PCIe capabilities register Jiang Liu
2012-07-11 9:01 ` Taku Izumi
2012-07-11 14:27 ` Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 02/14] PCI: introduce pci_pcie_type(dev) to replace pci_dev->pcie_type Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 03/14] PCI: remove unused field pcie_type from struct pci_dev Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 04/14] PCI: refine and move pcie_cap_has_*() macros to include/linux/pci.h Jiang Liu
2012-07-10 18:49 ` Bjorn Helgaas
2012-07-10 15:54 ` [RFC PATCH 05/14] PCI: add access functions for PCIe capabilities to hide PCIe spec differences Jiang Liu
2012-07-10 18:35 ` Bjorn Helgaas
2012-07-11 3:07 ` Jiang Liu
2012-07-11 3:40 ` Bjorn Helgaas
2012-07-11 6:40 ` Jiang Liu
2012-07-11 17:52 ` Bjorn Helgaas
2012-07-12 2:56 ` Jiang Liu
2012-07-12 20:49 ` Bjorn Helgaas
2012-07-15 16:47 ` Jiang Liu
2012-07-16 17:29 ` Bjorn Helgaas
2012-07-16 18:57 ` Don Dutile
2012-07-17 0:09 ` Jiang Liu
2012-07-17 0:14 ` Bjorn Helgaas
2012-07-10 15:54 ` [RFC PATCH 06/14] PCI: use PCIe cap access functions to simplify PCI core implementation Jiang Liu
2012-07-10 18:35 ` Bjorn Helgaas
2012-07-11 2:49 ` Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 07/14] hotplug/PCI: use PCIe cap access functions to simplify implementation Jiang Liu
2012-07-10 18:35 ` Bjorn Helgaas
2012-07-10 15:54 ` [RFC PATCH 08/14] portdrv/PCI: " Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 09/14] pciehp/PCI: " Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 10/14] PME/PCI: " Jiang Liu
2012-07-10 15:54 ` Jiang Liu [this message]
2012-07-10 15:54 ` [RFC PATCH 12/14] ASPM/PCI: " Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 13/14] r8169/PCI: " Jiang Liu
2012-07-10 15:54 ` [RFC PATCH 14/14] qib/PCI: " Jiang Liu
2012-08-15 19:12 ` [Resend with Ack][PATCH v1] PCI: allow acpiphp to handle PCIe ports without native PCIe hotplug capability Bjorn Helgaas
2012-08-16 15:15 ` Jiang Liu
2012-08-22 15:16 ` [PATCH v2] PCI: allow acpiphp to handle PCIe ports w/o " Jiang Liu
2012-09-24 22:10 ` Bjorn Helgaas
2012-09-25 15:16 ` Jiang Liu
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