From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, Russell King <linux@arm.linux.org.uk>,
Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@free-electrons.com>
Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
linux-arm-kernel@lists.infradead.org,
Maen Suleiman <maen@marvell.com>,
Lior Amsalem <alior@marvell.com>,
Thierry Reding <thierry.reding@gmail.com>
Subject: [PATCHv6 12/13] PCI: mvebu: add support for MSI
Date: Thu, 1 Aug 2013 15:25:15 +0200 [thread overview]
Message-ID: <1375363516-2620-13-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1375363516-2620-1-git-send-email-thomas.petazzoni@free-electrons.com>
This commit adds support for Message Signaled Interrupts in the
Marvell PCIe host controller. The work is very simple: it simply gets
a reference to the msi_chip associated to the PCIe controller thanks
to the msi-parent DT property, and stores this reference in the
pci_bus structure. This is enough to let the Linux PCI core use the
functions of msi_chip to setup and teardown MSIs.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
.../devicetree/bindings/pci/mvebu-pci.txt | 3 +++
drivers/pci/host/pci-mvebu.c | 31 ++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
index f8d4058..77e0ffe 100644
--- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt
+++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
@@ -12,6 +12,8 @@ Mandatory properties:
- device_type, set to "pci"
- ranges: ranges for the PCI memory and I/O regions, as well as the
MMIO registers to control the PCIe interfaces.
+- msi-parent: Link to the hardware entity that serves as the Message
+ Signaled Interrupt controller for this PCI controller.
In addition, the Device Tree node must have sub-nodes describing each
PCIe interface, having the following mandatory properties:
@@ -46,6 +48,7 @@ pcie-controller {
#size-cells = <2>;
bus-range = <0x00 0xff>;
+ msi-parent = <&mpic>;
ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 13a633b..884cf82 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -11,6 +11,7 @@
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/mbus.h>
+#include <linux/msi.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/of_address.h>
@@ -107,6 +108,7 @@ struct mvebu_pcie_port;
struct mvebu_pcie {
struct platform_device *pdev;
struct mvebu_pcie_port *ports;
+ struct msi_chip *msi;
struct resource io;
struct resource realio;
struct resource mem;
@@ -695,6 +697,12 @@ static struct pci_bus *mvebu_pcie_scan_bus(int nr, struct pci_sys_data *sys)
return bus;
}
+void mvebu_pcie_add_bus(struct pci_bus *bus)
+{
+ struct mvebu_pcie *pcie = sys_to_pcie(bus->sysdata);
+ bus->msi = pcie->msi;
+}
+
resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev,
const struct resource *res,
resource_size_t start,
@@ -731,6 +739,7 @@ static void __init mvebu_pcie_enable(struct mvebu_pcie *pcie)
hw.map_irq = mvebu_pcie_map_irq;
hw.ops = &mvebu_pcie_ops;
hw.align_resource = mvebu_pcie_align_resource;
+ hw.add_bus = mvebu_pcie_add_bus;
pci_common_init(&hw);
}
@@ -755,6 +764,26 @@ mvebu_pcie_map_registers(struct platform_device *pdev,
return devm_request_and_ioremap(&pdev->dev, ®s);
}
+static void __init mvebu_pcie_msi_enable(struct mvebu_pcie *pcie)
+{
+ struct device_node *msi_node;
+ struct irq_domain *msi_domain;
+
+ msi_node = of_parse_phandle(pcie->pdev->dev.of_node,
+ "msi-parent", 0);
+ if (!msi_node)
+ return;
+
+ msi_domain = irq_find_msi_host(msi_node);
+ if (!msi_domain)
+ return;
+
+ pcie->msi = msi_domain->msi_chip;
+
+ if (pcie->msi)
+ pcie->msi->dev = &pcie->pdev->dev;
+}
+
static int __init mvebu_pcie_probe(struct platform_device *pdev)
{
struct mvebu_pcie *pcie;
@@ -879,6 +908,8 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
i++;
}
+ mvebu_pcie_msi_enable(pcie);
+
mvebu_pcie_enable(pcie);
return 0;
--
1.8.1.2
next prev parent reply other threads:[~2013-08-01 13:25 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-01 13:25 [PATCHv6 00/13] MSI support for Marvell EBU PCIe driver Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 01/13] PCI: use weak functions for MSI arch-specific functions Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 02/13] PCI: remove ARCH_SUPPORTS_MSI kconfig option Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 03/13] PCI: Introduce new MSI chip infrastructure Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 04/13] irqdomain: add irq_alloc_mapping() function Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 05/13] irqdomain: refactor __irq_domain_add() Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 06/13] irqdomain: add support to associate an irq_domain with a msi_chip Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 07/13] irqdomain: add function to find a MSI irq_domain Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 08/13] irqchip: armada-370-xp: properly request resources Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 09/13] irqchip: armada-370-xp: implement MSI support Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 10/13] ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci Thomas Petazzoni
2013-08-01 13:25 ` [PATCHv6 11/13] ARM: mvebu: the MPIC now provides MSI controller features Thomas Petazzoni
2013-08-01 13:25 ` Thomas Petazzoni [this message]
2013-08-01 13:25 ` [PATCHv6 13/13] ARM: mvebu: link PCIe controllers to the MSI controller Thomas Petazzoni
2013-08-01 16:08 ` [PATCHv6 00/13] MSI support for Marvell EBU PCIe driver Stephen Warren
2013-08-01 16:14 ` Thomas Petazzoni
2013-08-01 16:50 ` Bjorn Helgaas
2013-08-01 17:58 ` Thomas Petazzoni
2013-08-06 18:10 ` Thomas Petazzoni
2013-08-06 22:39 ` Benjamin Herrenschmidt
2013-08-07 9:03 ` Thomas Petazzoni
2013-09-18 20:23 ` Grant Likely
2013-08-06 20:02 ` Jason Cooper
2013-08-06 20:08 ` Stephen Warren
2013-08-07 15:51 ` Jason Cooper
2013-08-07 6:59 ` Thierry Reding
2013-08-07 15:55 ` Jason Cooper
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1375363516-2620-13-git-send-email-thomas.petazzoni@free-electrons.com \
--to=thomas.petazzoni@free-electrons.com \
--cc=alior@marvell.com \
--cc=andrew@lunn.ch \
--cc=bhelgaas@google.com \
--cc=ezequiel.garcia@free-electrons.com \
--cc=grant.likely@secretlab.ca \
--cc=gregory.clement@free-electrons.com \
--cc=jason@lakedaemon.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=maen@marvell.com \
--cc=rob.herring@calxeda.com \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).