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From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Grant Likely <grant.likely@linaro.org>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	Yinghai Lu <yinghai@kernel.org>, Len Brown <len.brown@intel.com>,
	Pavel Machek <pavel@ucw.cz>,
	x86@kernel.org, Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-acpi@vger.kernel.org, Ingo Molnar <mingo@kernel.org>,
	linux-pm@vger.kernel.org
Subject: [Patch V3 31/37] x86, irq: simplify the way to handle ISA IRQ
Date: Tue, 27 May 2014 16:08:06 +0800	[thread overview]
Message-ID: <1401178092-1228-32-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1401178092-1228-1-git-send-email-jiang.liu@linux.intel.com>

On startup, setup_IO_APIC_irqs() will program all IOAPIC pins for ISA
IRQs. Later when mp_map_pin_to_irq() is called, it just returns ISA IRQ
number without programming corresponding IOAPIC pin.

This patch consolidates the way to program IOAPIC pins for both ISA and
non-ISA IRQs into mp_map_pin_to_irq() as below:
1) For ISA IRQs, mp_irqs array is used to map IOAPIC pin to IRQ and
   mp_irqdomain_map() is used to actually program the pin.
2) For non-ISA IRQs, irqdomain is used to map IOAPIC pin to IRQ, and
   mp_irqdomain_map() is also used to actually program the pin.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
 arch/x86/kernel/acpi/boot.c    |   15 +------
 arch/x86/kernel/apic/io_apic.c |   88 ++++++++++++----------------------------
 2 files changed, 29 insertions(+), 74 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4788b3f50f69..0592c38d9952 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -100,17 +100,6 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
 
 #define	ACPI_INVALID_GSI		INT_MIN
 
-static int map_gsi_to_irq(unsigned int gsi, unsigned int flags)
-{
-	int i;
-
-	for (i = 0; i < NR_IRQS_LEGACY; i++)
-		if (isa_irq_to_gsi[i] == gsi)
-			return i;
-
-	return mp_map_gsi_to_irq(gsi, flags);
-}
-
 /*
  * This is just a simple wrapper around early_ioremap(),
  * with sanity checks for phys == 0 and size == 0.
@@ -504,7 +493,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
 
 int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
 {
-	int irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
+	int irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
 
 	if (irq >= 0) {
 		*irqp = irq;
@@ -1051,7 +1040,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
 		return -1;
 	}
 
-	irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
+	irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
 	if (irq < 0)
 		return irq;
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 25a2877a5788..7fc34fcf3ea3 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -207,9 +207,6 @@ static int __init parse_noapic(char *str)
 }
 early_param("noapic", parse_noapic);
 
-static int io_apic_setup_irq_pin(unsigned int irq, int node,
-				 struct io_apic_irq_attr *attr);
-
 /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */
 void mp_save_irq(struct mpc_intsrc *m)
 {
@@ -1021,34 +1018,35 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
 	struct irq_domain *domain = mp_ioapic_irqdomain(ioapic);
 	struct mp_pin_info *info = mp_pin_info(ioapic, pin);
 
+	if (!domain)
+		return -1;
+
+	mutex_lock(&ioapic_mutex);
+
 	/*
 	 * Don't use irqdomain to manage ISA IRQs because there may be
 	 * multiple IOAPIC pins sharing the same ISA IRQ number and
 	 * irqdomain only supports 1:1 mapping between IOAPIC pin and
 	 * IRQ number.
 	 */
-	if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci))
-		return mp_irqs[idx].srcbusirq;
-
-	if (!domain) {
-		/*
-		 * Provide an identity mapping of gsi == irq except on truly
-		 * weird platforms that have non isa irqs in the first 16 gsis.
-		 */
-		return gsi >= NR_IRQS_LEGACY ? gsi : gsi_top + gsi;
+	if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {
+		irq = mp_irqs[idx].srcbusirq;
+		if ((flags & IOAPIC_MAP_ALLOC) && info->count == 0 &&
+		    mp_irqdomain_map(domain, irq, pin) != 0)
+			irq = -1;
+	} else {
+		irq = irq_find_mapping(domain, pin);
+		if (irq <= 0 && (flags & IOAPIC_MAP_ALLOC))
+			irq = alloc_irq_from_domain(domain, gsi, pin);
 	}
 
-	mutex_lock(&ioapic_mutex);
-	irq = irq_find_mapping(domain, pin);
-	if (irq <= 0 && (flags & IOAPIC_MAP_ALLOC))
-		irq = alloc_irq_from_domain(domain, gsi, pin);
-
 	if (flags & IOAPIC_MAP_ALLOC) {
 		if (irq > 0)
 			info->count++;
 		else if (info->count == 0)
 			info->set = 0;
 	}
+
 	mutex_unlock(&ioapic_mutex);
 
 	return irq > 0 ? irq : -1;
@@ -1465,55 +1463,23 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
 	ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry);
 }
 
-static bool __init io_apic_pin_not_connected(int idx, int ioapic_idx, int pin)
-{
-	if (idx != -1)
-		return false;
-
-	apic_printk(APIC_VERBOSE, KERN_DEBUG " apic %d pin %d not connected\n",
-		    mpc_ioapic_id(ioapic_idx), pin);
-	return true;
-}
-
-static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
-{
-	int idx, node = cpu_to_node(0);
-	struct io_apic_irq_attr attr;
-	unsigned int pin, irq;
-
-	for_each_pin(ioapic_idx, pin) {
-		idx = find_irq_entry(ioapic_idx, pin, mp_INT);
-		if (io_apic_pin_not_connected(idx, ioapic_idx, pin))
-			continue;
-
-		irq = pin_2_irq(idx, ioapic_idx, pin,
-				ioapic_idx ? 0 : IOAPIC_MAP_ALLOC);
-		if (irq < 0 || !mp_init_irq_at_boot(ioapic_idx, irq))
-			continue;
-
-		/*
-		 * Skip the timer IRQ if there's a quirk handler
-		 * installed and if it returns 1:
-		 */
-		if (apic->multi_timer_check &&
-		    apic->multi_timer_check(ioapic_idx, irq))
-			continue;
-
-		set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
-				     irq_polarity(idx));
-
-		io_apic_setup_irq_pin(irq, node, &attr);
-	}
-}
-
 static void __init setup_IO_APIC_irqs(void)
 {
-	unsigned int ioapic_idx;
+	unsigned int ioapic, pin;
+	int idx;
 
 	apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
-	for_each_ioapic(ioapic_idx)
-		__io_apic_setup_irqs(ioapic_idx);
+	for_each_ioapic_pin(ioapic, pin) {
+		idx = find_irq_entry(ioapic, pin, mp_INT);
+		if (idx < 0)
+			apic_printk(APIC_VERBOSE,
+				    KERN_DEBUG " apic %d pin %d not connected\n",
+				    mpc_ioapic_id(ioapic), pin);
+		else
+			pin_2_irq(idx, ioapic, pin,
+				  ioapic ? 0 : IOAPIC_MAP_ALLOC);
+	}
 }
 
 /*
-- 
1.7.10.4


  parent reply	other threads:[~2014-05-27  8:08 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-27  8:07 [Patch V3 00/37] use irqdomain to dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-27  8:07 ` [Patch V3 01/37] x86, irq: update high address field when updating affinity for MSI IRQ Jiang Liu
2014-05-27  8:11   ` Thomas Gleixner
2014-05-27  8:50     ` Jiang Liu
2014-05-27  8:07 ` [Patch V3 02/37] genirq, trivial: improve documentation to match current implementation Jiang Liu
2014-05-27  8:07 ` [Patch V3 03/37] x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) Jiang Liu
2014-06-03  0:41   ` David Rientjes
2014-05-27  8:07 ` [Patch V3 04/37] x86, mpparse: simplify arch/x86/include/asm/mpspec.h Jiang Liu
2014-05-27  8:07 ` [Patch V3 05/37] x86, PCI, ACPI: use kmalloc_node() to optimize for performance Jiang Liu
2014-05-27 13:50   ` Bjorn Helgaas
2014-05-27 21:22   ` David Rientjes
2014-05-27  8:07 ` [Patch V3 06/37] x86, acpi, irq: kill static function irq_to_gsi() Jiang Liu
2014-05-27  8:07 ` [Patch V3 07/37] x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c Jiang Liu
2014-05-27  8:07 ` [Patch V3 08/37] x86, ACPI, irq: enhance error handling in function acpi_register_gsi() Jiang Liu
2014-05-27  8:07 ` [Patch V3 09/37] x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ Jiang Liu
2014-05-27  8:07 ` [Patch V3 10/37] x86, irq, trivial: minor improvements of IRQ related code Jiang Liu
2014-05-27  8:07 ` [Patch V3 11/37] x86, ioapic: kill unused global variable timer_through_8259 Jiang Liu
2014-05-27  8:07 ` [Patch V3 12/37] x86, ioapic: kill static variable nr_irqs_gsi Jiang Liu
2014-05-27  8:07 ` [Patch V3 13/37] x86, ioapic: introduce helper utilities to walk ioapics and pins Jiang Liu
2014-05-27  8:07 ` [Patch V3 14/37] x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability Jiang Liu
2014-05-27  8:07 ` [Patch V3 15/37] x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain Jiang Liu
2014-05-27  8:07 ` [Patch V3 16/37] x86, irq: introduce some helper utilities to improve readability Jiang Liu
2014-05-27  8:07 ` [Patch V3 17/37] x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number Jiang Liu
2014-05-27  8:07 ` [Patch V3 18/37] x86, irq, ACPI: change __acpi_register_gsi to return IRQ number instead of GSI Jiang Liu
2014-05-27  8:07 ` [Patch V3 19/37] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-27 19:58   ` Thomas Gleixner
2014-05-28  5:01     ` Jiang Liu
2014-05-28 21:08       ` Thomas Gleixner
2014-05-28 21:22         ` Thomas Gleixner
2014-05-28  8:01     ` Sebastian Andrzej Siewior
2014-05-28 10:07       ` Thomas Gleixner
2014-05-28 10:39         ` Sebastian Andrzej Siewior
2014-06-05  7:04           ` [RFC Patch 3/3] x86, irq: count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY Jiang Liu
2014-06-05  8:15             ` Thomas Gleixner
2014-05-27  8:07 ` [Patch V3 20/37] x86, irq: enhance mp_register_ioapic() to support irqdomain Jiang Liu
2014-05-27  8:07 ` [Patch V3 21/37] x86, ACPI, irq: provide basic irqdomain support Jiang Liu
2014-05-27  8:07 ` [Patch V3 22/37] x86, mpparse, " Jiang Liu
2014-05-27  8:07 ` [Patch V3 23/37] x86, SFI, " Jiang Liu
2014-05-27  8:07 ` [Patch V3 24/37] x86, devicetree, irq: use common mechanism to support irqdomain Jiang Liu
2014-05-27  8:08 ` [Patch V3 25/37] x86, irq: introduce two helper functions to support irqdomain map operation Jiang Liu
2014-05-27  8:08 ` [Patch V3 26/37] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins Jiang Liu
2014-05-27  8:08 ` [Patch V3 27/37] x86, irq, mpparse: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 28/37] x86, irq, SFI: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 29/37] x86, irq, devicetree: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 30/37] x86, irq: clean up unused IOAPIC interface Jiang Liu
2014-05-27  8:08 ` Jiang Liu [this message]
2014-05-27  8:08 ` [Patch V3 32/37] genirq: export irq_domain_disassociate() to architecture interrupt drivers Jiang Liu
2014-05-27  8:08 ` [Patch V3 33/37] x86, irq: introduce helper functions to release IOAPIC pin Jiang Liu
2014-05-27  8:08 ` [Patch V3 34/37] x86, irq, ACPI: release IOAPIC pin when PCI device is disabled Jiang Liu
2014-05-27  8:08 ` [Patch V3 35/37] x86, irq, mpparse: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 36/37] x86, irq, SFI: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 37/37] x86, irq, devicetree: " Jiang Liu

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