From: Kishon Vijay Abraham I <kishon@ti.com>
To: <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <jg1.han@samsung.com>,
<bhelgaas@google.com>, <mohit.kumar@st.com>,
<linux-kernel@vger.kernel.org>
Cc: <kishon@ti.com>, <grant.likely@linaro.org>,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
Marek Vasut <marex@denx.de>, Arnd Bergmann <arnd@arndb.de>
Subject: [PATCH 1/3] PCI: designware: Configuration space should be specified in 'reg'
Date: Wed, 25 Jun 2014 23:26:45 +0530 [thread overview]
Message-ID: <1403719007-9352-2-git-send-email-kishon@ti.com> (raw)
In-Reply-To: <1403719007-9352-1-git-send-email-kishon@ti.com>
The configuration address space has so far been specified in *ranges*,
however it should be specified in *reg* making it a platform MEM resource.
Hence used 'platform_get_resource_*' API to get configuration address
space in the designware driver.
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Mohit Kumar <mohit.kumar@st.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/designware-pcie.txt | 4 ++++
drivers/pci/host/pcie-designware.c | 17 +++++++++++++++--
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index d0d15ee..ed0d9b9 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -2,6 +2,10 @@
Required properties:
- compatible: should contain "snps,dw-pcie" to identify the core.
+- reg: Should contain the configuration address space.
+- reg-names: Must be "config" for the PCIe configuration space.
+ (The old way of getting the configuration address space from "ranges"
+ is deprecated and should be avoided.)
- #address-cells: set to <3>
- #size-cells: set to <2>
- device_type: set to "pci"
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 1eaf4df..0b7b455 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -20,6 +20,7 @@
#include <linux/of_pci.h>
#include <linux/pci.h>
#include <linux/pci_regs.h>
+#include <linux/platform_device.h>
#include <linux/types.h>
#include "pcie-designware.h"
@@ -396,11 +397,23 @@ static const struct irq_domain_ops msi_domain_ops = {
int __init dw_pcie_host_init(struct pcie_port *pp)
{
struct device_node *np = pp->dev->of_node;
+ struct platform_device *pdev = to_platform_device(pp->dev);
struct of_pci_range range;
struct of_pci_range_parser parser;
+ struct resource *cfg_res;
u32 val;
int i;
+ cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
+ if (cfg_res) {
+ pp->config.cfg0_size = resource_size(cfg_res)/2;
+ pp->config.cfg1_size = resource_size(cfg_res)/2;
+ pp->cfg0_base = cfg_res->start;
+ pp->cfg1_base = cfg_res->start + pp->config.cfg0_size;
+ } else {
+ dev_err(pp->dev, "missing *config* reg space\n");
+ }
+
if (of_pci_range_parser_init(&parser, np)) {
dev_err(pp->dev, "missing ranges property\n");
return -EINVAL;
@@ -433,6 +446,8 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
of_pci_range_to_resource(&range, np, &pp->cfg);
pp->config.cfg0_size = resource_size(&pp->cfg)/2;
pp->config.cfg1_size = resource_size(&pp->cfg)/2;
+ pp->cfg0_base = pp->cfg.start;
+ pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
}
}
@@ -445,8 +460,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
}
}
- pp->cfg0_base = pp->cfg.start;
- pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
pp->mem_base = pp->mem.start;
pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
--
1.7.9.5
next prev parent reply other threads:[~2014-06-25 17:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 17:56 [PATCH 0/3] dra7: Add PCIe support Kishon Vijay Abraham I
2014-06-25 17:56 ` Kishon Vijay Abraham I [this message]
2014-06-26 5:55 ` [PATCH 1/3] PCI: designware: Configuration space should be specified in 'reg' Mohit KUMAR DCG
2014-07-08 12:50 ` Jingoo Han
2014-06-25 17:56 ` [PATCH 2/3] PCI: designware: use untranslated address while programming ATU Kishon Vijay Abraham I
2014-06-26 5:37 ` Pratyush Anand
2014-06-26 6:10 ` Kishon Vijay Abraham I
2014-06-26 6:33 ` Pratyush Anand
2014-06-26 8:24 ` Kishon Vijay Abraham I
2014-07-08 12:31 ` Kishon Vijay Abraham I
2014-07-08 13:17 ` Jingoo Han
2014-07-09 9:38 ` Kishon Vijay Abraham I
2014-07-09 3:40 ` Mohit KUMAR DCG
2014-06-25 17:56 ` [PATCH 3/3] PCI: host: pcie-dra7xx: add support for pcie-dra7xx controller Kishon Vijay Abraham I
2014-07-08 12:34 ` Kishon Vijay Abraham I
2014-07-09 10:28 ` Kishon Vijay Abraham I
2014-07-05 17:32 ` [PATCH 0/3] dra7: Add PCIe support Bjorn Helgaas
2014-07-08 3:47 ` Pratyush Anand
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